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pingpangqiu
- 本文使用 FPGA 芯片来模拟实际的乒乓球游戏。本设计是基于 Altera 公司的 FPGA Cyclone II 芯片 EP2C5T144C8 的基础上实现，运用 Verilog HDL 语言编程，在 Quartus II 软件上进行编译、仿真，最终在开发板上成功实现下载和调试。 -This article uses the FPGA chip to simulate the actual game of table tennis. The design is based Altera
15_tlc5620dac
- 这是芯片tlc5420数字模拟信号传换实验，实验是用verilog语言写的，希望对大家有用-This is the pass the chip tlc5420 digital-to-analog signal change experiment, experiment verilog language written in the hope that useful. . .
FPGA_RS232
- FPGA芯片,利用Verilog硬件描述语言实现与PC电脑通信功能。-FPGA chip, the Verilog hardware descr iption language and PC computer communication function.
8-SEG-LED-Board
- 基于FPGA的EPM 1270芯片开发板的8 SEG LED Board Verilog程序，已通过测试，能正常使用，引脚已配好。-Based the EPM 1270 chip FPGA development board 8 SEG LED Board Verilog program has been tested normal use, the pin with a good.
VGA
- 基于FPGA EPM1270芯片的VGA Verilog显示程序，已测试，完全正常使用，引脚已配好-VGA Verilog FPGA EPM1270 chip-based display program, test, and completely normal use, the pin with a good
JOYSTICK
- 基于FPGA EPM1270芯片的JOYSTICK程序，使用Verilog编写，能正常使用，引脚已配好-, Use the JOYSTICK program based on FPGA EPM1270 chip in Verilog, normal use, the pin with a good
Buzzer
- 基于FPGA EP3C16芯片的Buzzer程序，使用Verilog语言编写，已测试通过，引脚已分配好-FPGA EP3C16 chip Buzzer-based program, use the Verilog language, have been tested, the pin has been assigned
AD9957_Signal_Generate
- AD9957芯片通过FPGA配置的verilog程序,要自建工程，代码测试完全可用-AD9957 chip FPGA configuration verilog program, to be self-built project, code test is completely available
S8_UART
- FPGA串口Verilog程序，用的芯片是xilinx spantan6-The FPGA serial Verilog the program chip with xilinx spantan6
spi
- SPI verilog HDL语言编写的模块化代码，在EP1C12Q240C8in芯片平台，调试过。接口便于调用。-SPI verilog HDL language writing of the modular code, in EP1C12Q240C8in chip platform, a debugging. Interface easy to call.
sm
- 基于xc4vsx25芯片而开发的verilog语言程序，实现按键输入数字密码并显示于数码管上的功能。程序均已通过调试试验，可于SEED-XDTK_V4实验箱上实现。-Verilog language program developed based xc4vsx25 chip key input digital password displayed on the digital tube on the function. Procedures are debugging test in SEED-
DAC-TLC5620_
- 基于verilog的硬件设计，DAC芯片TLC5620_verilog代码-The DAC chip TLC5620_verilog code verilog-based hardware design
1.UART
- 该代码主要实现UART的串行通信，针对的是RS232芯片，同时包含了verilog和VHDL编写的程序-The code UART serial communication, RS232 chip, also contains a program written in verilog and VHDL
USB-245BMWR20121211
- 关于用verilog语言进行USB芯片FT245BM读写的代码-The verilog language USB chip FT245BM read and write code
code
- 32bits流水线加法器，verilog语言的，xilinx公司芯片上运行通过-The 32bits pipelined adder verilog language, xilinx chip run through
daima
- 32bits进位选择加法器，verilog语言的，xilinx公司芯片上运行通过-The 32bits carry select adder verilog language, xilinx chip run through
daima
- 32bits提前进位加法器，verilog语言的，xilinx公司芯片上运行通过-The 32bits advance carry adder verilog language, xilinx chip run through
code
- 32bits补码加法器，verilog语言的，xilinx公司芯片上运行通过-The 32bits complement adder verilog language, xilinx chip run through
runningclock
- verilog HDL实现跑表设计，开发环境为xilinx，fpga芯片为spartan系列。-verilog HDL the Stopwatch design and development environment for the spartan xilinx, fpga chip series.
UART
- 本论文使用Verilog HDL 语言描述硬件功能，利用QuartusII 5.0在 FPGA 芯片上的综合描述,采用模块化设计方法设计UART（通用异步收发器）的各个模块。-The paper using Verilog HDL language to describe hardware features, the use of the FPGA chip QuartusII 5.0 comprehensive descr iption of the modular design approa