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DAC0832_control
- 用verilog HDL编程实现的基于DAC0832的三角波信号，可借鉴编程实现DAC0832芯片控制-Programming with verilog HDL DAC0832-based triangular wave signal, we may learn programming DAC0832 chip control
test
- 利用verilog 寫 三角波的產生 利用verilog 寫 三角波的產生-Written using the triangular wave generated verilog verilog to write using the triangular wave generated by the triangular wave generation write verilog
EP2C8_PER_pwm
- EP2C8Q208,产生PWM波的程序，verilog编写的，希望对大家有用-EP2C8Q208, PWM wave generation process, verilog written in the hope that useful
VCDdecoder
- 基于GTK-wave做的verilog test bench语法解析器 解析vcd file. 俺自己写的-VCD (Value Change Dump) file is widely used in industry. A VCD file is an ASCII file, which contains header information, variable definitions and the value changes for specified variables, or
sin_50Hz
- 基于FPGA的50Hz的正弦波的产生，verilog语言-FPGA-based 50Hz sine wave generation, verilog language
poc
- verilog 写的POC接口代码。测试波形功能通过。内有波形模拟CPU以及仿真文件。-A poc module written by verilogHDL.Can be used in communicating with MCUs. The simulate wave file is already inside.
sincount
- 用verilog语言开发的，ise产生正弦波的工程文件-Ise generate the triangular wave file
fankuizhendang
- 本程序是基于verilog HDL语言设计的反馈震荡电路的程序。其构成的电路叫振荡电路。能将直流电转换为具有一定频率交流电信号输出的电子电路或装置。种类很多，按振荡激励方式可分为自激振荡器、他激振荡器；按电路结构可分为阻容振荡器、电感电容振荡器、晶体振荡器、音叉振荡器等；按输出波形可分为正弦波、方波、锯齿波等振荡器。-This program is a feedback oscillator circuit design based on Verilog HDL language program
da--sine
- 利用dds方法，通过DA输出正弦波，频率1KHz 频率根据代码可调-DA output sine wave frequency 1KHz (Verilog)
sine_wave_2011_0329
- 正弦波波形发生器，verilog编写，Modsim仿真。-sine wave genonter
xinhao
- 基于verilog的数字信号产生器，包括三角波、方波、正弦波，频率可调。-Verilog-based digital signal generator, including a triangle wave, square wave, sine wave, frequency adjustable.
DDS-SIN
- 用verilog语言实现DDS的正弦波发送-DDS sine wave sent verilog language
Frequency-tester
- 数字频率计，能自动测试输入方波脉冲的频率，通过LCD1602显示，是用Verilog HDL写的-Digital frequency measurement，Can automatic testing input square wave pulse frequency, through the LCD1602 shows, it is to use Verilog HDL write
sinw
- 用verilog写的正弦波发生器，QuartusⅡ环境-Sine wave generator written in Verilog
DDS
- DDS正弦波发生模块 基于verilog语言实现 在cycloneii系列FPGA上经过验证 频率步进1khz 共有256个点-The DDS sine wave module based on verilog language achieve in cycloneii series FPGA proven frequency stepping 1khz 256 points
verilog_dds
- verilog实现dds，用于FPGA产生正弦波，适用于Cyclone 2系列-verilog achieve dds, FPGA is used to generate the sine wave, in the Cyclone Series
DE0_NANO_default
- PWM波控制LED亮度,使用Verilog语言，开发环境为Altera的quatus 11，使用的的DE0-Nano-PWM wave control LED brightness, the use of the Verilog language development environment for Altera' s quatus 11, use the DE0-Nano
dds_project
- DDS直接数字频率合成器，能产生正弦波，方波，锯齿波，三角波四种波形，同时能在12864上显示波形类型和频率，用FPGA verilog实现的-DDS direct digital frequency synthesizer can produce sine, square wave, sawtooth wave, triangle wave four waveform, while in the 12864 on display the waveform type and frequency
frequency
- 能够检测方波正弦波以及锯齿波的频率，并且以及试过可以运行，采用的开发环境是ISE，编程语言是Verilog-Able to detect a square wave frequency of the sine wave and sawtooth wave, and as well tried can run the development environment is the ISE, the programming language is Verilog
Regtangle_wave_DDS
- 利用VERILOG编写的DDS产生方波的程序-Using VERILOG written DDS program produce a square wave