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add_ff8
- FPGA adder code flip-flop verilog code -FPGA adder code flip-flop verilog code
ep2c35_3.8_full_add
- 这个程序用verilog硬件语言编写。用来在FPGA内实现全加器。并且可以将输出显示在外部LED灯上等。-this program is writen by verilog HDL.it is the full adder for FPGA.users can read the result from the LEDs.
Prefix_KoggeStone_32
- 经典的kogge-stone加法器结构，32结构，verilog代码-Classic kogge-stone adder structure, 32 structure, verilog code
add
- verilog编写的浮点数加法器.包含两个文件。-floating adder
verilog_Common_arithmetic
- 常用逻辑运算，加法器，乘法器及除法器的verilog语言，可用modelsim或Quartus II 9.0环境-Common logic operation, adder, multiplier and divider verilog language, can be used modelsim or Quartus II 9.0 environment
carry_lookahead_add4
- 4位的超前进位加法器，门级电路连接得到，verilog代码实现-4-bit look-ahead adder, gate-level circuit
BCDadd8
- 8位的BCD加法器，BCD表示即4bit表示一个十进制数，取值范围是0000-0110，verilog代码实现-8-bit BCD adder, BCD said that 4bit represents a decimal number, range is 0000-0110, verilog code
addsub
- Verilog HDL: Adder/Subtractor
lab6_repeat
- Verilog adder of a four bit system. this adder adds four digit
Question1
- a four bit adder implemented with verilog programming
Control
- 实现加法器的控制，利用verilog语言。在modelsim环境先实现。-Realization of adder control, the use of Verilog language. In the Modelsim environment to achieve.
4add
- verilog 实现两级流水线加法器 源代码 以及测试代码 adder16_2.v test_adder16_2.v-verilog Implement two pipeline adder source code and test code adder16_2.v test_adder16_2.v
For_student_demo
- verilog HDL编写的音乐程序和加法器程序 -The music and adder program files by verilog HDL
bk
- 16位Brent-Kung加法器的verilog代码-the verilog code of the 16 bits of the Brent-Kung s adder
codes
- verilog code for carry look ahead adder.
logic
- Verilog HDL逻辑与计算机设计基础实验全部试验报告，包括寄存器，定时器，全加器，同步时序电路，译码器等的实验。-Verilog HDL logic and computer design basic experiment all test reports, including registers, timers, full adder, synchronous sequential circuits, decoders and other experiments.
CarryLA_Adder
- carry look ahead adder in verilog
add_sub
- this source is adder_substrate verilog source adder and subatrate mix very gooooood!
4addr
- 用verilog 语言编写的4位全加器，还是入门基础必备.-Verilog language with 4bit full adder, or basic essential.also it s so important to learn verilog!
add16
- designing of 16 bit adder using 4 bit adder using verilog code