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bpsk
- 二相相移键控（BPSK）调制解调过程的MATLAB仿真实现。ASK、FSK、PSK这三种数字调制方式在抗干扰噪声能力和信号频谱利用率等方面，以相干PSK的性能最好，目前已在中、高速传输数据时得到广泛应用。-Binary phase shift keying (BPSK) modulation and demodulation process, MATLAB Simulation. ASK, FSK, PSK modulation in the three digital noise interf
signal11
- ASK调制解调模块 FSK调制解调模块 4FSK调制解调模块 8FSK调制解调模块 MSK调制解调模块 DBPSK调制解调模块 4PSK调制解调模块 8PSK调制解调模块 -ask
matlab
- 2ask的调制解调以及matlab仿真，包括频谱分析等-2ask the modem and the matlab simulation, including spectral analysis
ASKxiangganjietiao
- ASK仿真，包含调制解调，加高斯白噪声，matlab程序-ASK simulation, including the modem, add Gaussian white noise, matlab program
modulation
- 通信原理中的数字调制方式与解调，包括了最常用的ask,psk,fsk的调制以及多种解调方式-the modulation and demodulation demo of ask, fsk ,dpsk and psk
simulink
- simulink的数字调制解调仿真。以simulink为基础平台，对2ASK、2FSK、2PSK信号的仿真-Digital modulation and demodulation simulink simulation. The simulink-based platform, 2ASK, 2FSK, 2PSK Signal Simulation
ASK
- 在MATLAB中的数字信号ASK调制解调-ASK modulation and demodulation
ask
- ask调制解调程序及相应误码率计算。随机产生正弦信号，进行ask幅度调制及解调。-ask modulation and demodulation process. Randomly generated sinusoidal signals, amplitude modulation and demodulation ask.
ASK
- 基于MATLAB的ASK调制与解调的程序，能有效实现ASK调制与解调。-MATLAB-based ASK modulation and demodulation process can effectively achieve the ASK modulation and demodulation.
code
- <基于Verilog HDL的通信系统设计>源码，包含ASK,FSK,PSK,QPSK,PPM等的调制解调-< Verilog HDL-based communication system design> source, including ASK, FSK, PSK, QPSK, PPM and other modem
simulink_2ask_2fsk_2psk
- 基于simulink的二进制ask、fsk、psk的调制解调系统的设计-Simulink based binary ask, fsk, psk modem system design
ask
- 利用matlab软件设计并仿真下面的无线通信系统。模拟信源为单音频信号。模拟调制方式为ASK。信道为多径信道（仿真中2径），信道中噪声为加性高斯白噪声。采用相干解调接收。画出了解调器输出端性能曲线与点信噪比SNR的关系。-Software design and simulation using matlab the following wireless communication systems. A single analog audio signal source. Analog modul
ASK
- ASK调制与解调的VHDL源程序 附带仿真-ASK modulation and demodulation of the VHDL source code with simulation
ASK
- MATLAB实现ASK调制解调。 内含主文件、demo文件，高斯噪声文件等等。-MATLAB ASK modulation and demodulation.
ask-psk-qpsk
- ask，psk ,qpsk 调试解调verilog源码，是无线通信fpga设计这本书上的，比较简单的实现方式-ask, psk, qpsk debugging demodulator verilog source, is a wireless communications fpga design of this book, a relatively simple way to achieve
ASK
- 数字通信计算机仿真设计的框架，具体参数可以自行设定。包括调制、解调、滤波、传输、噪声对通信质量的影响等-Computer simulation of digital communications framework, specific parameters can be set. Including modulation, demodulation, filtering, transmission, and noise on the communication quality, etc.
ask
- ASK调制与解调VHDL程序及仿真，完全实现，详细！-ASK modulation and demodulation process and VHDL, and simulation, fully realized, in detail!
ASK-modulation
- ASK调制与解调VHDL程序及仿真，里面包含完整的源程序，适合初学者-ASK modulation and demodulation process and VHDL simulation, which contains the complete source code, suitable for beginners
ASK
- ASK调制解调，及在AWGN信道下的性能-ASK modulation and demodulation, and performance in AWGN channel
8.9-ASK-modulation-VHDL
- 用VHDL实现ASK的调制和解调仿真程序，简单实用很有有帮助-Using VHDL ASK modulation and demodulation simulation program