搜索资源列表
use_3_shoft
- SHA-1的verilog程序，经过优化的了，希望可以对大家有帮助-SHA-1 of the verilog program, optimized, and hope that we can help you
I2C
- Verilog实现的I2C协议，直接在ISE下打开就可以-Verilog implementation I2C protocol to open directly in the ISE can be
UART
- Verilog实现的UART程序，用ISE打开工程文件即可-Verilog implementation UART program, open the project file with the ISE can be
USB
- Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
vga
- Verilog实现的VGA程序，用ISE打开工程文件即可-Verilog implementation VGA program, open the project file with the ISE can be
mips
- 使用verilog設計的MIPS處理器，mips處理機的模擬且可合成驗証-MIPS processor using the verilog design, mips processor synthesis of analog and can be verified
ECC
- 我整理的ECC加密算法，源码和C实现的理论指导，有这个可以做出ECC加密算法-I am finishing ECC encryption algorithm, source and C to achieve the theoretical guidance, it can make ECC encryption algorithm
i2cflash
- I2c的Verilog描述，可以读取at24c512存储器-I2c the Verilog descr iption can be read at24c512 memory
car
- 用VHDL实现的红外循迹小车程序，采用8个红外二极管（装在车头底部）识别路况，接L298电机驱动电路，能跑白色背景下的黑色赛道，且能应付道路分叉，孤岛及自启动等。-Implemented using VHDL infrared tracking car program, using eight infrared diodes (mounted on the front of the bottom) to identify traffic, then L298 motor driver circu
sram_saa1117verilog
- 图像采集、存储控制verilog源代码，fpga控制SAA1117,采集数据存储到sram，仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
async_fifo
- verilog HDL写的异步fifo代码及测试平台，直接可用，可生成RTL代码-asynchronous fifo write verilog HDL code and test platform, directly available, can generate RTL code for
ddc
- 仿真了DDC的工作流程，不了解数字下变频的朋友可以下载-DDC emulation of the workflow, do not understand the digital down-conversion can be downloaded to see if a friend
I2C
- 用verilog编写实现的I2C协议源码，自带控制台，解压后用ISE打开工程文件即可。-Prepared achieved with the I2C protocol verilog source code, comes with the console, after decompression project file can be opened with the ISE.
canbus
- 用verilog编写实现的CAN总线控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the verilog source code to achieve the CAN bus controller, bring their own testbench, after decompression project file can be opened with the ISE.
mac_controller
- 用verilog编写实现的以太网控制器（MAC）源码，解压后用ISE打开工程即可。-Prepared using verilog implementation Ethernet Controller (MAC) source code, open the project after decompression can be used ISE.
FPGA2SRAM
- verilog code that can implemented on ACEX1k FPGA for a SRAM-verilog code that can implemented on ACEX1k FPGA for a SRAM
tongxinyuanli
- 数字通信原理 曹志刚版的SPI总线硬件描述语言Verilog下的实现，含主模式和从模式的实现，经过仿真验证，可作为一个单独的模块使用--Digital Communication Principles of CAO Zhi-gang version of the SPI bus, under the Verilog hardware descr iption language implementation, including Master mode and slave mode of impl
yiweiDCTbianhuan
- 一维DCT变换的Verilog HDL源程序，在ISE中已经通过编译，可以参考里面的文档。-One-dimensional DCT transform Verilog HDL source code, in the ISE has been through the compilation, you can refer to inside the document.
m1_core.tar
- 一个小巧的mips处理器，verilog写的，大家可以-A small mips processor, verilog written, we can see
CPU
- verilog实现的一个简单的CPU，大家可下载去瞅瞅啊-verilog to achieve a simple CPU, you can download to Chou Chou ah