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top_pnadd32
- 32位元浮点数加法器,用于以VHDL编写的32位元CPU-32 bits floating-point Add
T65_v302
- VHDL source codes of a 65xx compatible cpu core. Version 302.
cpu86
- CPU86 8086. IP core.
mips1
- Verilog MIPS design. I found it somewhere on Internet and it is working :-Verilog MIPS design. I found it somewhere on Internet and it is working :))))
cup
- cpu控制器用vhdl代码编写组成原理的控制器组合逻辑-cpu controller using vhdl coding theory composed of combinational logic controller
EDA
- 利用 VHDL 设计的许多实用逻辑系统中，有许多是可以利用有限状态机的设计方案来 描述和实现的。无论与基于VHDL 的其它设计方案相比，还是与可完成相似功能的CPU相 比，状态机都有其难以逾越的优越性，它主要表现在以下几方面： h由于状态机的结构模式相对简单，设计方案相对固定，特别是可以定义符号化枚举 类型的状态，这一切都为 VHDL 综合器尽可能发挥其强大的优化功能提供了有利条件。而 且，性能良好的综合器都具备许多可控或不可控的专门
cpusample
- VHDL编写的CPU仿真程序。 能进行CPU仿真，加法乘法运算等。 里面包含相关课件。-CPU emulation program written in VHDL. CPU emulation can be carried out, addition multiplication and so on. Which contains the relevant courseware.
ALU
- vhdl code for alu and detemines the basic components of alu unit in cpu system
mipsfinal
- 用vhdl设计的一个mips小型cpu，不带流水，有r类，i类，j类指令都有~·-Using vhdl design a mips small cpu, with no running water, there are r class, i type, j class instruction have ~*
CPUcoa-course-design
- 简单的cpu设计，包括memory，alu运算器，comp比较器以及控制器control，寄存器register等的vhdl编写的程序。-A simple cpu design, including memory, alu arithmetic logic unit, comp comparator and controller control, such as vhdl register register write programs.
computerc
- VHDL 编写的简单的CPU 输入程序可以进行有优先级的加减与或的计算，包含键盘和数码管的程序-CPU write simple VHDL program can enter a priority level or the calculation of addition and subtraction and that contains the keyboard and digital control of the process
myspu
- vhdl编写的cpu程序，直接用状态机编写的，没有微指令过程，基本算法都包含，新手学习用-vhdl cpu written procedures for the preparation of a state machine directly, without microcode process, the basic algorithms are included, beginners learn to use
MIPS_CPU
- MIPS结构的CPU，采用VHDL编码，附带验证程序，能够跑题hash算法，流水灯，求π程序-MIPS structure of the CPU, using VHDL coding, with the verification process, to get off track and hash algorithms, water lights, find π procedures
5744114893829
- 用VHDL实现16位的简单CPU。具有加减乘除等功能-vhdl cpu can do add sub and so on
alu_all
- VHDL设计的流水CPU,开发环境是quartusII,代码经过验证，完全是自主开发的源码-A CPU designed by VHDL with PIPE
SAYEH
- vhdl language for design CPU
NonPipelined_Design
- 用VHDL实现的非流水线CPU设计，可以稍加改动变成流水线设计-VHDL implementation with non-pipelined CPU design
RISC_CPU
- 利用VHDL实现risc cpu，IPcode 的risc cpu-Using VHDL implementation risc cpu, IPcode the risc cpu
The_cpu_of_the_VHDL_language_programming
- 有关cpu的VHDL语言编程The cpu of the VHDL language programming不错的例子程序-The VHDL language programming the cpu The cpu of the VHDL language programming examples of good procedures
cpu01
- cpu 16 bit fpga vhdl