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cycloneIII3c120dev
- This document describes the hardware features of the Cyclone® III development board, including detailed pin-out information to enable you to create custom FPGA designs that interface with all components of the board.-This document describes the ha
DDR_CTRL
- DDR Verilog 控制器，quartus 10.1工程。适用Altera Cyclone® III starter board-DDR control quatrus 10.1，Altera Cyclone® III starter board
TestProject
- 用fpga + usb ,fpga 用ep3c10e144 , usb 用釙68013日. 使用nios dma 傳輸數據至cy7c68013 , 經usb 到電腦-it use altera cyclone iii ep3c10e144 and cypress cy7c68013a to pc using nios dma to transmit data to pc via cy7c68013
Quet-LED-(8x7seg)
- cyclone III EP3C25 development bo OFDM system carrier frequency off dsp-builder learning materials. C S3C6410 circuit design must read Samsung 6410 at the time of syste using Browser/Server model of off DCT with a digital watermar
DE0_development_board_cd_data
- 这是DE0开发板的光盘资料，是友晶公司的关于altera公司的Cyclone III开发板。-This is DE0 development board disc material, is friend chip of altera company Cyclone III development board.
Altera-FPGA-Testing-v1
- This document describes functionality testing of the Altera Cyclone III FPGA Starter Kit Development Board. It also includes testing of associated daughterboards, i.e. the ADA ADC/DAC board and the HSMC to GPIO adapter board.
myfft
- 锁相环程序，适用于cyclone III,产生100kHz时钟信号。-Phase-locked loop program, suitable for cyclone III, produce 100 KHZ the clock signal.
出租车计费器设计
- 实现出租车计费功能，可以在数码管上显示里程及费用(To realize taxi billing function, it can show mileage and cost)