搜索资源列表
DDS-Waveform-generator
- 采用FPGA实现的DDS波形发生器源码，可以实现频率幅值变换、正弦波、方波、三角波输出，输出频率可达1MHz-FPGA implementation of the DDS waveform generator source frequency amplitude transform, sine wave, square wave, triangle wave output, the output frequency up to 1MHz
DDS
- 基于fpga的dds多种信号发生器的代码-signal generator based on fpga
DDS
- DDS正弦波发生模块 基于verilog语言实现 在cycloneii系列FPGA上经过验证 频率步进1khz 共有256个点-The DDS sine wave module based on verilog language achieve in cycloneii series FPGA proven frequency stepping 1khz 256 points
verilog_dds
- verilog实现dds，用于FPGA产生正弦波，适用于Cyclone 2系列-verilog achieve dds, FPGA is used to generate the sine wave, in the Cyclone Series
dds-5
- 基于FPGA cyclone III EP3C16F484C6的dds正弦波发生器，频率可调-the dds sine wave generator based on the FPGA cyclone III EP3C16F484C6 , frequency adjustable
ddslabview
- The reference design and example presented in this article illustrates how you can add a DDS (direct digital synthesis) waveform generator to your LabVIEW FPGA based applicationThe examples for this article are contained in a LabVIEW 8.5.1 project.
dds
- 基于FPGA的数字信号发生器，通过直接数字合成法，产生方波、正玄波、锯齿波、三角波-FPGA-based digital signal generator, the direct digital synthesis to produce a square wave, sine wave, sawtooth, triangle wave
DDS
- 基于FPGA EP3C16芯片的DDS信号发生器程序，包含了12864液晶显示，DAC0832数模转换，功能实现，引脚已配置部分-FPGA EP3C16 chip-based DDS signal generator program contains 12,864 LCD, DAC0832 digital-to-analog conversion, the function, the pin configuration section
DDS
- 利用现场可编程逻辑门阵列FPGA实现直接数字频率合成（DDS）的原理，以及以DDS为核心的信号发生器。探讨DDS技术在FPGA中 的实现方法，提出采用ALTERA公司的FLEX系列FPGA芯片FLEX10K进行直接数字频率合成的VHDL源程序。-The use of field-programmable gate array FPGA to realize the principle of the direct digital frequency synthesis (DDS) DDS as t
DDS.ZIP
- 基于FPGA的DDS信号发生器设计，能显示至少三种波形，方波，三角波，正弦波-FPGA-based DDS signal generator design, capable of displaying at least three waveforms, square wave, triangle wave, sine wave
FPGA-DDS-algorithm
- 采用FPGA的DDS算法Verilog程序的实现-FPGA DDS algorithm Verilog program implementation
dds_quicklogic-FPGA
- dds_quicklogic FPGA DDS信号源-dds_quicklogic FPGA
DDS
- VHDL DDS 采用FPGA实现1hz到100khz可调的dds程序,频率调节步长是变化的。-Using FPGA 1hz to 100khz adjustable, dds program, the frequency adjustment step change.
DDS
- 这是一个用EP2C5T144的FPGA制作的DDS信号发生器，输出信号波形可变，幅度可调，缺点是信号频率略低，带有电路图-This is a used EP2C5T144 FPGA produced DDS signal generator, the output signal waveform variable adjustable amplitude, the disadvantage is that the signal frequency is slightly lower, with
DDS
- 基于FPGA的Dds 直接数字频率合成 属于毕业设计性质的资料-Nature is a graduate design based on FPGA the Dds direct digital frequency synthesis
DDS
- FPGA，基于VHDL语言，用于ROM查找表的方式，实现DDS，能够输出正弦，方波，锯齿波，方波四种波形，可以改变幅值和频率。-DDS based on FPGA(VHDL)
FPGA-DDS
- 基于FPGA的DDS实现QuartusII工程和论文-Based on the FPGA DDS QuartusII project and paper
FPGA-DDS-signal-source-design
- FPGA实现dds的编程，很直观详细的资料-FPGA DDS signal source design
DDS
- 首先利用VC6.0程序产生正弦波，三角波ROM数据，并将数据导入FPGA的ROM，利用TLV5618是串行输入的12位高精度快速双口D/A转换器输出。-First using VC6.0 program generate sine wave, triangle wave ROM data, and the data import the ROM of the FPGA, using TLV5618 is high precision and fast duplex serial input 12
dds
- 基于FPGA，利用vhdl语言结合matlab工具实现dds,已经仿真-Based on FPGA, VHDL language with matlab tools to achieve DDS, has simulation