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dds_generater
- 波形发生器，可以生成正弦波、三角波、方波、锯齿波；可以选择输出频率和幅度，基于DDS设计，verilog和QuartusII开发-Waveform generator can generate sine, triangle, square wave, sawtooth wave you can the output frequency and amplitude, DDS-based design, verilog and development QuartusII
FPGA_phase_lock_demodulation
- FPGA 用Verilog语言实现数字锁相解调系统，包含了正交的DDS函数发生器和相应的AD驱动-FPGA digital demodulation system in Verilog lock, comprising a DDS orthogonal function generator and driving the corresponding AD
DDS_BPSK
- 基于DDS的BPSK调制器设计Verilog源码- U57FA u4E8.08 u868
sin
- 能够实现正弦波的输出以及通过频率控制字与相位控制字控制正弦波的相位与频率。(The output of the sine wave can be realized and the phase and frequency of the sine wave can be controlled by two control words.)
dds_rom
- 基于查找表的DDS的Verilog实现，分为相位累加器模块、ROM模块和顶层DDS模块(Verilog implementation of DDS based on lookup table)