搜索资源列表
098111__1367421625730
- DE2_System_v1.4a.zip 71.2M 2007- 02 22:51 For DE2 boards with Serial Number (S/N) starting with Digit 0 and QuartusII version 6.0 DE2_System_v1.4b.zip 79.4M 2007-07-11 22:42 For DE2 boards with Serial Number (S/N) starting with Digit 0
13_vga256
- Verilog code for display VGA coding for the DE2 Board of FPGA
LCD-controller---VHDL
- vhdl languge, i use the vhdl language for lcd controller with de2 board.
LCD-controller---Nghia
- different code for lcd controller using de2 board with vhdl lanuage
Verilog-HDL-based-signal-generator
- 应用Verilog进行编写四种波形发生的程序，并结合DE2板与DVCC实验板上的D/A转换器在示波器显示出波形。初步了解Verilog的编程及DE2板的应用，加强对其的实际应用操作能力。-Verilog waveform application process for the preparation of the four occurred, combined with D DE2 board and DVCC experimental board/A converter in the osci
Quartus_FPGA
- this a smal programme that convert a binary code to a gray code, and a file that expalin the DE2 pin assignements-this is a smal programme that convert a binary code to a gray code, and a file that expalin the DE2 pin assignements
Quartus_FPGA_detect
- this a simple VHDL code on quartus that can detect a sequence of binary input, this files contain an DE2 pins assignements -this is a simple VHDL code on quartus that can detect a sequence of binary input, this files contain an DE2 pins assigne
7segment
- 使用DE2开发板进行数码管和LED灯控制程序，利用18个拨码开关控制18个红色LED灯并控制数码管显示。-DE2 performed using digital control and LED light control procedures
DE2_NET.ZIP
- Altera DE2 Ethernet Controller
DE2_70_D5M1
- fpga，vhdl，de2-70，数字摄像头-fpga, vhdl, de2-70, a digital camera
cooperation
- nios2移植uclinux，并在de2实现，包括quartus下的整个工程以及linux下的image文件。-This file describes how to use nios2 to run linux.
sdram-uclinux
- 使用最新的系统搭建工具Qsys构建了包括sdram的nios2系统，编写了程序，并在de2上实现。-This file is used to drive the sdram for qsys users.
de2-normal
- de270开发板常用的资料，包括引脚，开发板介绍，及在quartus下的使用。-This file is used to describe the de270 board.
craps
- this the source code we have been working on for our project using altera de2 board. the code can be run but some of it miss the end game module, while some doesn t have the complete vga code-this is the source code we have been working on for our pr
test-of-reaction-time
- 利用DE2开发板设计一个，测试反应时间的程序，并把时间显示出来。-Use DE2 development board to design a test of reaction time program, and the time is displayed.
DE2_70_D5M_XVGA
- 针对DE2修改的工程文件，可以正常输出1280*1024的视频图像，并且可以自行进行源码的修改-For DE2 modified project file, it can output 1280* 1024 video image, and modify the source code can be
sc_computer_student
- 单周期CPU,需要一定代码的添加，DE2板，altera工程环境-Single-cycle CPU, need to add some code, DE2 board, altera engineering environment
cetvrtak13
- 8通道示波器，采用DE2-115FPGA综合，带有RS232连接，VGA驱动，IR驱动。用verilog编写。-8-channel oscilloscope, using DE2-115FPGA integrated with RS232 connection, VGA driver, IR driver. Written in verilog.
DE2_115_WEB_SERVER_MII_ENET0
- DE2_115_WEB_SERVER_MII_ENET0:千兆以太网,ALTERA公司DE2板网络通信，实现PC机控制板子LED级数码管/LCD屏显示（MII）-DE2_115_WEB_SERVER_MII_ENET0:Gigabit Ethernet, ALTERA DE2 board network communications company, to achieve control of the PC board level digital tube LED/LCD screen disp
DE2_115_WEB_SERVER_MII_ENET1
- DE2_115_WEB_SERVER_MII_ENET1:千兆以太网,ALTERA公司DE2板网络通信，实现PC机控制板子LED级数码管/LCD屏显示（MII）-DE2_115_WEB_SERVER_MII_ENET1:Gigabit Ethernet, ALTERA DE2 board network communications company, to achieve control of the PC board level digital tube LED/LCD screen dis