搜索资源列表
BramCfgRefProj
- digilent BramCfg Reference Project .-digilent BramCfg Reference Project.
ZedBoard_OOB_Design
- xilinx Zynq Digilent Zedboard上的可运行的Linux系统以及源码文件，有详细说明-xilinx Zynq Digilent Zedboard running Linux system as well as the source file, there is a detailed descr iption of
Zedboard_boot_guide_IDS14_1
- Xilinx Zynq Digilent ZedBoard boot生成说明-The Xilinx Zynq Digilent ZedBoard boot build instructions
zedboard
- xilin Zynq Digilent Zedboard官方资料汇总，开发Zedboard必备-xilin Zynq Digilent Zedboard official data summary of, development Zedboard essential
ZedBoard_sch
- xilinx zynq Digilent Zedboard 原理图-the xilinx zynq Digilent Zedboard schematic
VGA_CHAR_WAVE
- FPGA 示波器，使用 digilent 的 nexys2 板子。可以在 VGA 显示器上显示波形及字符。AD 为 60M 采样频率 8bit 的 ADS830E 。-The FPGA Oscilloscope, use digilent, the nexys2 board. Waveform can be displayed on a VGA monitor and character. The AD for 60M sampling frequency 8bit ADS830E.
lab7_files
- 关于Digilent Atlys Spartan-6 FPGA development board audio ac97的讲解及具体应用的源码-Digilent Atlys Spartan-6 FPGA development board audio of ac97' s presentation as well as the specific application' s source code
humanpong
- 我们的目标是建立一个人力乒乓球比赛的FPGA板（Xilinx公司的Virtex-II Pro的XC2VP30与的Digilent公司VDEC1的视频解码器）。-Our group objective is to build a Human Pong game on an FPGA board (Xilinx Virtex-II Pro XC2VP30 with the Digilent VDEC1 Video Decoder).
doorlock.rar
- 门锁 状态机 verilog 适用于digilent NEXYS2开发板,doorlock state machine verilog applied to digilent NEXYS2 board
Lab_01_demux
- ITS THE DEMUX OF 4 BIT WRITTEN IN VHDL BASED ON DIGILENT XYLINX 14.2
PmodDA1-RefComp
- 关于数字信号转化成模拟信号的介绍和描述参考《温度采样子程序通用标准模块》表格中的子程序接口变量参数。-Digilent PmodDA1™ Digital To Analog Module Converter Board Reference Manual
DACSPI1
- 关于数模转换器的资料和文件。硬件描述语言VHDL是很重要的-The Digilent PmodAD1 Digital to Analog Module Converter module (the DA1™ ) converts signals from digital to analog at up to one MSa per second. The DA1 uses a 6-pin header connector and at less than one squa
Adept-IOExpansion
- digilent ioexpansion
vertex5_digilent_emac0_1gbps
- Digilent公司开发板GENESYS板载1Gbps网口实现驱动程序，实现回环模式的发送。-Digilent development board GENESYS onboard 1Gbps ethernet driver, send the loopback mode
UniversalDIV
- UNIVERSAL FREQUENCY DIVIDER pin sets for Digilent Basys 2 (Spartan3E-250) fout = (K(0)*100+ K(1)*10 + K(2))*10K(3)
Basys2UserTest
- 由digilent生产的basys2开发板用户测试程序VHDL版-Produced by the digilent basys2 development board user testing procedures VHDL version
20140306mii
- 在digilent公司genesys开发板上，使用temac ip核实现了10/100M网口的驱动。-Implementation of a driver for 10M/100M ethernet communication on GENESYS form digilent.
Second_Counter
- 这是一个四位的数字秒表，精确到0.01秒，三个按键，三个按键，一个复位，一个开始，一个停止,在Digilent的basys2开发板上运行，只须修改ucf约束即可在其他FPGA开发板上运行。-This is a four-digit digital stopwatch, accurate to 0.01 seconds, three buttons, three buttons, a reset, a beginning, a stop, run Digilent' s basys2 dev
Intro_to_Digital_Design-Digilent-Verilog_Online.z
- Nice Book for Verilog Basics
ADCSPI
- ADCSPI The Digilent PmodAD1 contains two simultaneous A/D conversion channels. Digilent provides an Arduino driver library for this device that is able to access only one converter channel. This document provides an overview of the ope