搜索资源列表
dpram
- 包含整个工程，是用verilog来编写，实现双口ram的功能-Contains the entire project is to write Verilog to achieve the function of the dual-port ram
Port-RAMs
- 介绍双口ram功能，进一步了解在fpga上怎么设计一个双口ram-Introduced the dual-port ram function to learn more about the fpga on how to design a dual port ram
Package
- Package consists of two pdf files: i)cdr project: theory and implementation of vhdl ii)I2C bus controller: xilinx implementation of uC interface on CPLD Package consists of 7 vhdl files: string_detector: detects the continuous string of 11
Example-b4-1
- 1. 定制一个双端口RAM，DualPortRAM 2. 在顶层工程中实例化这个RAM 3. 实现这个工程，在Quartus II仿真器中做门级仿真 4. 在ModelSim中对这个工程进行RTL级仿真 -Customize a dual port RAM, DualPortRAM On the top floor of the RAM engineering instantiation To realize the project, in Quartus II simu
FIFO
- FPGA内设计同步FIFO和异步FIFO，以及双口RAM的方法,FIFO设计的经验之谈，非常经典。-Synchronous FIFO and asynchronous FIFO, and dual-port RAM within the FPGA design,FIFO design rule of thumb, very classic.
IMX233
- its is ARM 9 SBC Designed in Eagle 5.11 with schematic. IMX233 with 64mb Ram , External boot from SD card. Compost Video and GPIO Interface with USART and UART. dual layer pcb-its is ARM 9 SBC Designed in Eagle 5.11 with schematic. IMX233 with 64mb R
IDT70V24L15PFI
- 双口RAM，IDT70V24L15PFI 的文档-Dual-port RAM, IDT70V24L15PFI documentation
test
- The design shows how to use Dual port RAM in FPGA design
ram_2
- 简易双口ram，使用两个ram ip core，一个写的同时另一个读，并且包含按键使能和数码管以及流水灯显示-Simple dual-port ram, two ram the ip core, a write while another read, and contains buttons to enable digital pipe and the water light show
AdualportramtT
- 采用两片AT89S51对双口RAM IDT7132测试试程序，采用串口助手显示接收内容。， -Using the two AT89S51 dual-port RAM the IDT7132 test pilot program, the serial assistant receive content. ,
DportRAMComm
- 在双口RAM的8051单片机之间的通讯，数据传输与接收。-Communications, data transmission and reception between the dual-port RAM 8051.
staticram_driver
- 基于at91rm9200的sram驱动，sram为16k*16的双口ram，测试通过，读写正常-Based at91rm9200 the sram drive, sram 16k* 16 dual port ram test passed, read and write properly
Example-b4-1
- 利用quartusII开发软件的宏功能模块调用功能，定制了一个双端口RAM。-Utilize quartusII development software macro function module calls a function to customize a dual-port RAM.
dualram
- VHDL Dual Clock Synchronous RAM Design
Dual_RAM
- 两块DSP芯片之间通过双口RAM实现数据传递-To pass data between the dual-DSP
dualram
- 本文件给出了一种双口RAM的代码，开发语言为verilog。测试可用，欢迎下载-This document gives a dual-port RAM code verilog development language. Test is available, welcome to download
Using-the-Virtex-Block-SelectRAMP
- The Virtex™ series provides dedicated blocks of on-chip, true dual-read/write port synchronous RAM, with 4096 memory cells. Each port of the block SelectRAM+™ memory can be independently configured as a read/write port, a read port, o
WriteDulePortRam
- c8051f020,读写双口RAM， c8051f020,读写双口RAM，-c8051f020, dual-port RAM read and write C8051f020 read and write dual-port RAM, C8051f020 dual-port RAM read and write,
ram_led
- 文件包括分频、计数、伪双口ram读些和数码管显示，将50MHz的时钟分频为1Hz并计数，然后将结果存储在RAM中，然后读取计数结果并显示。-File divider, counting, pseudo-dual port ram read digital display, 50MHz clock frequency of 1Hz and count, then the result is stored in RAM, and then read the count results and dis
true_dual_port_ram_single_clock
- Quartus II VHDL Template. True Dual-Port RAM with dual clock.