搜索资源列表
DPRAM
- 网络控制器和链路控制器的CPU即是通过读写双端口RAM芯片完成网络层与数据链路层的原语交互。mailbox中写入的是原语的类型，而双端口RAM的其它存储空间则存放各种服务原语的参数。-network controller and the CPU controller link is through reading and writing dual-port RAM chip to complete the network layer and data link layer of the orig
firm_usb
- DSP通过双口RAM和ISP1581实现下位机的USB固件程序，调试通过，上位机驱动和读写例程，如果下载多的话再传-DSP through dual-port RAM and ISP 1581 to achieve lower computer's USB firmware and Debugging, PC drivers and routines to read and write, if you download are so tame
allidt_20020616.tar
- idt的双口ram的读写接口程序，verilog 代码，并且有测试文档-Employing a dual-port ram reader interface program, Verilog code, and a test document
dpram_fpga
- 这是我用vhdl语言，在fpga内部做了一个双口ram的程序。我的邮箱：wleechina@163.com-This is the language I used vhdl in fpga done an internal dual-port ram procedures. My mail : wleechina@163.com
my_ramlib_06
- 包括各种类型存储器的VHDL描述，如FIFO，双口RAM等 -including various types of memory VHDL descr iption, such as FIFO, Dual Port RAM, etc.
vhdl_ad0809_arm
- 本程序是用VHDL语言写的，包括AD0809，双口RAM等程序。已经调试过-this program is written in VHDL, including the AD0809, dual-port RAM, and other procedures. Debugging has been too
danpianji3
- SH601.C 单片机间的RS232串行通信程序 SH602.C 单片机和PC之间的串行通信程序 SH603.A51 用51单片机的I/O口模拟串口的例程 SH604.C 单片机的无线数据传输例程 SH605.A51 使用单片机实现I2C串行通信的例程 SH606.A51 使用单片机实现的红外数据传输 SH607.C 双端口RAM方式的数据通信例程 608 介绍电平转换芯片MAX485的使用方法和接口电路。 -SH601.C the RS232 serial co
pi06_src
- at91rm9200双端口RAM驱动及测试程序，支持信号量抢占，支持连续读取及重定位。-at91rm9200 dual-port RAM drive and testing procedures, the volume seize signal support, support for reading and re-positioning.
IDT7132
- AT89C52扩展外部双口RAM(IDT7132)，在Keil C51环境下测试，和一般的RAM使用方法相当！用串口调试助手观看测试结果-AT89C52 expand external dual-port RAM (IDT7132) Keil C51 in the test environment, and the general use of RAM is! Help with serial debugging watched test results
dualportRAM
- 双端口RAM的VHDL语言实现。完全在CPLD芯片上测试通过。可以实现对存储器读操作的同时对另外一个空间写操作-dual-port RAM VHDL. Totally CPLD chip test. Memory can be achieved right time to operate while the other was a space operation
my_fifo_vhdl
- XILINX的FPGA实现的双口ram源码，可作为dsp\\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \\ SDRAM and pci bridge, and can be used directly, through practical projects.
fifo
- FIFO电路(first in，first out)，内部藏有１６ｂｉｔ×１６ｗｏｒｄ的Dual port RAM，依次读出已经写入的数据。因为不存在Address输入，所以请自行设计内藏的读写指针。由FIFO电路输出的EF信号(表示RAM内部的数据为空)和FF信号(表示RAM内部的数据为满)来表示RAM内部的状态，并且控制FIFO的输入信号WEN(写使能)和REN(读使能)。以及为了更好得控制FIFO电路，AEF(表示RAM内部的数据即将空)信号也同时输出。
Asynchronous_read_write_RAM
- Dual Port RAM Asynchronous Read/Write 经过modelsim仿真
read_wirte_ram
- FPGA实现双口RAM功能，从而用FPGA实现双控制器间的数据交换-FPGA realization of dual-port RAM functions, the exchange of data between the dual-controller with FPGA
dual_RAM.rar
- actel fusion startkit FPGA开发板试验例程，可实现2k8的双口ram，实现数据存储，缓冲。包含verilog HDL 语言源码,actel fusion startkit FPGA development board test routines, can be realized 2k8' s dual-port ram, achieving data storage, buffer. Language source code contains the verilog
ramFIFO
- 双口RAM实现FIFO程序解释,说明.-FIFO dual-port RAM procedures to achieve explanation. Good
syncram_2p
- 这个一个基于amba总线的双端口ram的vhdl语言程序-The amba bus-based dual-port ram in vhdl language program
caiji1
- 利用两个双口ram做的乒乓操作，采集高速大容量数据，fpga写，arm读-Two dual-port ram to do the ping-pong operation, collecting high-speed large-capacity data, fpga write, arm reading
Dual-RAM
- DSP EMIF双口RAM和FPGA实现高速通信-DSP EMIF dual-port RAM and FPGA to achieve high-speed communications
基于Actel-FPGA-的双端口RAM-设计
- 基于Actel-FPGA-的双端口RAM-设计(Base Actel-FPGA-Dual Port Ram design)