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DSP
- FIR Digital Filter Design (DSP example) tested by Weijun Zhang, 04/2001 VHDL Data-Flow modeling KEYWORD: generate, array, range, constant and subtype- FIR Digital Filter Design (DSP example) tested by Weijun Zhang, 04/2001
xiaosong-fpga
- FIR数字滤波,亲自测试,都是源码,希望可以帮到大家,谢谢,谢谢!大家要好好学习呀,学习好VHDL(FIR digital filter, personally tested, are source code, and I hope to help you, thank you, thank you! We should study hard, good study, VHDL)