搜索资源列表
lcd_test
- 基于FPGA的LCD1602a显示.在液晶屏上显示英文字符“My rongrong”-FPGA-based display LCD1602a. In LCD display English characters "My rongrong"
LCD_vhdl
- LCD控制VHDL程序与仿真, FPGA驱动LCD显示中文字符“年”程序-lcd vhdl driver
DM10_KX8051_LCD128X64_C5T
- 在fpga内拟一个51单片机的核,实现按键控制12864液晶屏的显示-Fpga in the MCU 51 to be a nuclear, to achieve the control button 12864 LCD display
9927416lcd1602
- 非常常见的液晶lcd1602控制程序,vhdl代码,可用于FPGA开发使用-Very common LCD lcd1602 control procedures, vhdl code, can be used to develop the use of FPGA
Mars-EP1C6-F_code2
- 此包为FPGA学习板接口实验程序源代码,共包括13个实验程序,有7段数码管,1602液晶显示,12864液晶显示,I2C总线,串口通信,拨码开关等.-The packet interface to FPGA board experimental procedure to study the source code, a total of 13 experimental procedure, there are 7-segment digital tube, 1602 LCD 12864 LCD,
lcd_driver
- 用fpga驱动lcd的原代码,是用vhdl语言实现的-drive lcd by fpga,the source program is written by vhdl
On_fpga_lcd_driver_chip_design
- 基于fpga的液晶驱动开发过程相关资料,用于借鉴和学习-Fpga-based LCD driver development process relevant information, for reference and learning
DM10_KX8051_LCD128X64_C5T
- FPGA中嵌入8051的核 并且实现控制128*64的液晶显示-FPGA embedded in 8051 and to achieve control of the nuclear 128* 64 LCD
vga_lcd_latest[1].tar
- verilog编写的LCD控制器,FPGA仿真测试正确-lcd controller verilog
sessionspage.asp_files
- LCD program for fpga projects
VGAVesaDdc_pinout_files
- vhdl code for using lcd in an fpga project
db15-vga-pinout_files
- vhdl code for using lcd in a fpga project
an488_design_example
- 经典基于FPGA的LCD显示器的控制模块-FPGA-based LCD display control module
lcd_controller_latest.tar
- FPGA上实现的LCD显示器经典的控制程序-FPGA implementation of LCD monitors on the classic control procedures
DSP
- DSP硬件论文集,包含22篇DSP相关论文,caj格式。都是花银子买来的。 DSP与点阵式LCD显示器的接口设计.caj DSP体系结构在提高实时信号处理方面的作用.caj DSP器件的原理及应用.caj DSP在机械设备故障诊断中的应用.caj DSP应用的结构和发展方向.caj DSP技术及其应用讲座(六)──数字通信用数字调制解调器中的DSP技.caj DSP技术及其应用讲座第7讲语音识别及其DSP实现.caj DSP技术及其应用讲座第三讲数字信号处理器的发
FPGA_VHDL_1602
- FPGA控制1602液晶源代码 VHDL源文件-FPGA source code control 1602 LCD VHDL source file
NIOSII_de2
- 基于SOPC的FPGA系统设计,测试数码管、LED、液晶显示屏,整个系统在DE2上运行通过,使用的是Quartus 6.1套件-FPGA-based SOPC system design, testing, digital tube, LED, LCD display, the entire system run by the DE2, using Quartus 6.1 Suite
DDS1-2
- 利用FPGA设计一个直接数字频率合成器(DDS),要求能够通过键盘设定输出正弦波、三角波和方波,输出波形频率由键盘输入设定,液晶显示屏显示输出波形类型和频率,输出频率范围10Hz-20kHz,步长0.5Hz。-FPGA design using a direct digital synthesizer (DDS), requires the ability to set the keyboard output sine wave, triangle wave and square wave ou
VHDL_LCD1602
- 用FPGA来实现液晶LCD1602的读写显示操作的程序代码。-Using FPGA to implement reading and writing LCD1602 LCD display operation code.
DE2_CCD
- FPGA 上实现VGA控制器 开发平台为altera官方开发板de2 -DE2 FPGA VGA LCD