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dds
- 使用FPGA产生DDS信号发生器,方便移植,适合新手学习,开发环境Q2-Use FPGA generate DDS signal generator, easy migration, suitable for novices to learn, develop environment Q2
DDS
- 基于FPGA的数字信号合成器(DDS),采用VHDL语言编写,能够实现正弦波、三角波、方波、锯齿波这四种波形的产生。 提示:最后输出的模块是串行DA,可根据具体情况更改驱动。-Digital synthesizer (DDS) based on FPGA, using VHDL language, to achieve sine wave, triangle wave, square wave, sawtooth waveform generation four. Tip: The la
DDS
- 基于FPGA的用VHdl硬件语言实现的直接数字合成(DDS)。-FPGA hardware with VHdl of DDS-based language.
DDS
- 基于fpga的DDS详细设计方案 verilog语言 正弦计算器则对该相位值计算数字化正弦波幅度(芯片一般通过查表得到)。DDS芯片输出的一般是数字化的正弦波,因此还需经过高速D/A转换器和低通滤波器才能得到一个可用的模拟频率信号。-Direct Digital Synthesizer base on fpga use verilog Sine calculator to calculate the value of the digital phase sine wave amplitu
DDS
- 附件包括1.基于FPGA实现DDS正弦波产生2.对应程设计说明一份3.重要说明一份。使用的软件平台为ISE13.3,硬件平台为Xilinx公司的V4板子。-DDS generator
DDS
- verilog编写,使用fpga中dds手法,可以输出任意波形的发生信号。-verilog write, use the dds fpga way, you can output an arbitrary waveform signal occurs.
DDS
- 在C8051F360上结合FPGA实现DDS-Combining the FPGA to realize DDS on C8051F360
DDS
- DDS的FPGA实现(VHDL),只可调频,调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
DDS
- FPGA,ISE12.2,DDS代码,VHDL语言-FPGA, ISE12.2, DDS the code, VHDL language
cf_ad9129_ebz_edk_14_4_2013_03_12.tar
- FPGA+DDS+DAC,ADI参考设计-verification of AD9129-EVB based on FPGA
DDS
- 基于DDS算法的正余弦信号发生器的FPGA实现-Based on DDS Algorithm cosine signal generator FPGA
dds
- 基于FPGA的DDS程序代码,实现的功能强大可以输正弦波,三角波,方波等波形,并且频率可以调节。实现对应的功能强大。-FPGA-based DDS program code can achieve powerful output sine wave, triangle wave, square wave waveform and frequency can be adjusted. Implement corresponding powerful.
dds_clk
- VHDL代码实现FPGA中DDS功能,输出频率可调-VHDL code for the FPGA DDS function, the output frequency is adjustable
DDS
- 基于FPGA完成2001年电子设计竞赛直接数字频率合成器,有FPGA部分、MSP430程序以及相互通信的程序,完成题目全部要求-FPGA-based Electronic Design Competition 2001 complete direct digital frequency synthesizer, there is part of the program FPGA, MSP430 procedures and communicate with each other, to comp
DDS
- FPGA实现三通道DDS信号源Verliog程序-FPGA to achieve three-channel DDS signal source Verilog program
dds
- 这是一个基于FPGA设计的DDS信号发生器设计。能够生成正弦波\ASK\PSK\AM\FM等波形。-This is an FPGA design of DDS signal generator based on. Capable of generating sine \ASK\PSK\AM\FM and other waveforms.
DDS(ok)
- 制作ROM正弦表并填充FPGA内部ROM,通过调用内部数据实现正弦波输出,开发环境quartusii , 语言verilog , 调试通过 , 附有modelsim调试结果。-Make ROM sine table and fill the ROM internal FPGA, by calling the internal data to achieve the sine wave output, development environment QuartusII, Language Veri
dds
- FPGA产生dds正弦信号,基于quartus-FPGA generate dds sine signal, based on quartus
DDS
- 基于FPGA,Verilog语言编写的DDS信号发生器,可生成方波、正玄波,三角波。-Based FPGA, Verilog language DDS signal generator that generates a square wave, sine wave, triangle wave.
DDS
- 用FPGA实现DDS,代码测试正确,可用于初学者学习使用-FPGA with DDS, code testing is correct, can be used for beginners to learn to use