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SPWM-output
- 利用FPGA，采用DDS技术产生具有死区控制的SPWM波-To utilize FPGA, generation of DDS technology with deadband control SPWM wave
DDS_FPGA_Materals
- DDS的FPGA设计原理、结构和原代理，包含源代码和ModelSim仿真，是DDS初学者参考的优秀教程，图文并茂，上手容易！-DDS FPGA design principles, the structure and the original agent, including source code and ModelSim simulation，it is an excellent book for greenhand in studying DDS, the book is composed
signal-generator
- Design of DDS signal generator based on VHDL+FPGA, has been through the adjustable, can be directly used, simulation -DDS signal generator circuit design, Verilog source code, can be directly used, simulation
FPGA_DDS
- 本文档描述了基于FPGA的DDS信号发生器的设计过程，并给出了具体的程序-This document describes the DDS signal generator based on FPGA design process, and gives specific procedures
DDS_8bit_5_7yigai
- DDS函数信号发生,基于fpga的DDS函数信号发生器，已在黑金版上验证。-DDS Function happen fpga-based DDS Function Generator has been verified on the black gold version.
qpskddc
- fpga实现dds和下变频。DDS 技术具有频率切换时间短，频率分辨率高，频率稳定度高，输出信号的频率和相位可以快速切换，输出相位可连续，并且在改变时能够保持相位的连续，很容易实现频率、相位和幅度的数字控制。它在相对带宽、频率转换时间、相位连续性、高分辨率以及集成化等一系列性能指标方面远远超过了传统频率合成技术。因此在现代电子系统及设备的频率源设计中，尤其在通信领域，直接数字频率合成器的应用越来越广泛。-fpga implementation dds and downconversion. DD
dds_double_new
- FPGA用verilog语言编写的 dds程序，两路输出，频率可调，相位可调，输出波形可调-FPGA using verilog language dds program, two outputs, adjustable frequency, phase adjustable, adjustable output waveform
dds_again
- 基于FPGA的DDS。可以产生三种波形：正弦，方波，三角波。频率分辨率0.012Hz。频率从0至25MHz任意可调。-FPGA-based DDS. Can produce three waveforms: sine, square, triangle wave. Frequency resolution 0.012Hz. Frequency is adjustable from 0 to 25MHz.
code-sig_generate-V1.2
- 基于fpga的DDS的单片机控制端。设置波形选择，频率，幅度设置按键。幅度控制主要用到VCA810。-DDS fpga-based microcontroller control side. Set waveform selection, frequency, amplitude settings button. Amplitude control is mainly used VCA810.
cos_value
- 用于生成FPGA中RAM所需要的初始化文件dds.mif,此文件生成的是余弦波形。-This document of .m can generate document of .mif to provide data for RAM of FPGA.
xinhaoyuan
- DDS产生多种波形信号发生器，包括正弦波，三角波，方波，锯齿波。运行于Altera Cyclone FPGA平台。-DDS signal generator generates a variety of waveforms including sine, triangle wave, square wave, sawtooth wave. Running on Altera Cyclone FPGA platform.
2fsk_0516
- 运行于Altera Cyclone FPGA平台,基于DDS原理的FSK信号发生器，可产生FSK信号-Running on Altera Cyclone FPGA platform, based on the principle of DDS FSK signal generator for FSK signal
fsk
- 基于fpga的DDS实现,可以实现1hz-40Mhz的正弦信号，方波信号，锯齿波信号，三角波信号等的输出-DDS fpga-based implementation can be achieved 1hz-40Mhz sine signal, square wave signal, sawtooth signal, the output of the triangular wave signal, etc.
fm(912)
- 利用altera的FPGA，采用DDS原理实现FM调试，调试系数可改变，并通过DA变换输出，仿真以及下板测试成功-The use altera FPGA, using the DDS principle to achieve FM debugging, debugging coefficient can be changed through DA conversion output, simulation, and the lower plate test is successful
modulator-based-on-the-AD9957
- 介绍了一种以AD9957为核心器件的基于FPGA和DDS技术的通用数字调制器-This article introduces an universal digital modulator which is based on the AD9957 IC, FPGA, the technology of DDS.
sss
- 使用Verilog语言编写源代码.调用一些基本的IP核，如DCM模块、DDS模块ChipScope模块、乘法器模块等来实现调制.最后通过编程并利用FPGA板子实现AM、DBS、SSB的调制。-Using Verilog language source code. Invoke some basic IP cores, such as DCM module, DDS module ChipScope modules, multiplier module to achieve modulation.
Codes-and-Reports
- Verilog Source code for arbitrary waveform generator- simple DDS algorithm codes run on Xilinx Spartan-3E fpga to show output on dac pin. Please see the included report. its really simple to implement. all source code is given.
DDS_TEST
- 基于FPGA的DDS的实现，源代码及PCB工程文件-Implementation of FPGA based on DDS, the source code and the PCB project file
DDS_Core_Norml_ADDA_C5H
- 基于FPGA的DDS内核的信号采集和输出，是基于ALTERA公司的CycloneⅡ的EP2C5芯片，是一个很好的参考示例。-DDS core FPGA-based signal acquisition and output is based on the company s CycloneⅡ of EP2C5 ALTERA chip, is a good reference example.
mydds
- 通过VHDL编程，在FPGA内实现DDS模块生成正弦波-Through VHDL programming, within the FPGA to realize DDS module to generate sine wave