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logic
- Verilog HDL逻辑与计算机设计基础实验全部试验报告，包括寄存器，定时器，全加器，同步时序电路，译码器等的实验。-Verilog HDL logic and computer design basic experiment all test reports, including registers, timers, full adder, synchronous sequential circuits, decoders and other experiments.
Adders
- Adders in VHDL code! full adder,bvadder,adder
full_adder
- 4 bits architecture full adder
fa
- a full adder fully structural
ep1c12_7_full_add
- 1位全加器的VHDL设计，已经在试验箱上实验通过。-VHDL design of a full adder has been in the chamber on the experiment through.
fulladd4bit
- 這是全加器,名字為fulladd4bit.rar,功能為四位元的加法。-This is the full adder, the name of fulladd4bit.rar function is the addition of four bits.
4addr
- 用verilog 语言编写的4位全加器，还是入门基础必备.-Verilog language with 4bit full adder, or basic essential.also it s so important to learn verilog!
7483and7485
- 4位全加器7483和4位比较器7485实现一位8421BCD码全加器-Four full adder 7483, and four comparator 7485 a 8421BCD code full adder
acc
- 全加器，比较器等verilog hdl代码 以及测试代码-Full adder verilog hdl code of the comparator
11
- HSPICE 全加全减器设计 带波形仿真文件 超大规模集成电路设计-HSPICE full adder full subtracter design with VLSI design of the simulation waveform files
adder16
- 16位全加器，适合初学者用，上实验课使用杠杠的-The experimental class of 16-bit full adder, suitable for beginners, on the use of a lever! ! !
full_adder
- 一位全加器工程，用xilinx ISE设计，供初学者学习-A full adder works, the ISE design with xilinx for beginners to learn
CXT
- 通过调用半加器模块，实现全加器设计，含测试代码，通过验证-By calling the module of the half adder full adder design, with test code, by verifying
full_add
- vhdl code for full adder
fulladder
- 全加器 东北大学秦皇岛分校 电子设计自动化 实验-Full adder Northeastern University at Qinhuangdao electronic design automation experiment
FA_pow
- Power estimation of full adder including SAF and VCD file
plus
- 该程序的功能时利用单片机和与非门模拟全加器的功能-The program' s function simulation of microcontroller and NAND gate full adder function
multiplier
- 8*8的乘法器基于quartus2的显示文件，其中使用了门电路和全加器来实现的，全加器用以实现进位运算，由于是第一次上传文件，这个是基于quartus2的显示文件-8* 8 multiplier, which uses the gate and full adder to implement the full adder to achieve binary operations
multiplier
- 8*8的乘法器，其中使用了门电路和全加器来实现的，全加器用以实现进位运算，-8* 8 multiplier, which uses the gate and full adder to implement the full adder to achieve binary operations
add
- 16位的加法器，全加器，有效的利用了门电路用以实现全加器的进位-16 of the adder, full adder and effective use of the gate for the binary full adder