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Triangle
- vhdl 实现三角波输出,分辨率可调,与比较器连用可以实现PWM输出-VHDL generic Triangle,ENTITY Triangle IS port( rst : in std_logic clk : in std_logic tri_data:out std_logic_vector(7 downto 0) ) end Triangle
EE59
- A new algorithm is presented to control an MPPT (Maximum Power Point Tracker) through an FPGA (Field Programmable Gate Array). The photovoltaic module was assumed to be connected to a generic load by means of a DC/DC converter controlled through
mux
- mux 4 to 1 in vhdl with generic statement
ConterFPGA
- Implementing a Generic Conter in VHDL - FPGA
i2cBUS
- Altera的I2C总线FPGA程序,内有详细使用说明- The I2C Controller is available in VHDL and is optimized for the Altera® APEX™ , Stratix® , and Cyclone™ device families. All of the register addresses are defined as constants in the VHDL source
Multiplication-8-bit
- This a VHDl code for multipication of 8 bits and it is generic.-This is a VHDl code for multipication of 8 bits and it is generic.
spi_verilog_master_slave_latest.tar
- 该项目从需要具有强大而简单的以VHDL编写的SPI接口核心开始,用于通用的FPGA到设备接口。 所产生的内核产生小而高效的电路,从非常慢的SPI时钟到超过50MHz的SPI时钟。-This project started the need to have robust yet simple SPI interface cores written in VHDL to use in generic FPGA-to-device interfacing. The resulting co
Projekt7_GenericMultiplexer
- Simple Generic Multiplexer in VHDL