搜索资源列表
CODE_GEN
- 北斗、GPSC/A码生成器的verilog ，输出速率可调，使用verilog编写- FPGA-based GPS receiver complete code of the spreading code generator design using verilog language
BCH_EN
- 基于FPGA的GPS/BD信号发生器中BCH编码发生器模块，使用verilog编写- FPGA-based GPS/BD signal generator BCH code generator module, using verilog write
NAVI
- 基于fpga的GPS导航数据发生器，使用verilog编写- Fpga-based GPS navigation data generator, using verilog write
Matlab-Code
- The software receiver is a type of the GPS receiver based on software written on programmable circuits such as DSP or FPGA. Based on the flexibility of software, we can integrate many techniques, update new technologies and modify its parameters when
ClockSync
- 基于COMTEX-M3的IEEE1588,irigB对时的源程序，包括GPS对时程序，并将对时的结果写入FPGA中-Based COMTEX-M3 of IEEE1588, irigB on time source, including GPS for the program, and writes the results when the FPGA
Pmod_tr2
- FPGA pomd 接口演示实验包括蓝牙，gps，液晶显示等-FPGA pomd demonstration experiments interfaces including Bluetooth, gps, LCD, etc.
fpGA_Glonass
- 基于FPGA的GPS glonass信号的的捕获，有很好的借鉴作用-Based on the FPGA GLONASS satellite signal capture and anti-interference