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ata_latest.tar
- The OCIDEC (OpenCores IDE Controller) is a WISHBONE rev.B2 compliant ATA/ATAPI-5 host implementation. The ATA (AT Attachment) interface, also known as IDE (Integrated Drive Electronics) interface, provides a simple interface to low cost non-vol
eth_ocm_80_3
- MAC ethernet ip opencore
mcb_read_write
- 赛灵思 DDR2 用户接口程序 原创。希望对各位有用。-Xilinx DDR2 original user interface program. You want to be useful.
bluespec-80211atransmitter_latest.tar
- This package implements a parameterized baseband hardware logic for an 802.11a Transmitter. This project has since been subsumed by the OFDM baseband project which can also be found on opencores.-This package implements a parameterized baseband har
sasc_latest.tar
- rs232 verilog port from opencores.org
ADC0809
- 基于VHDL语言，实现对ADC0809简单控制。ADC0809没有内部时钟，需外接10KHz~1290Hz的时钟信号，这里由FPGA的系统时钟（50MHz）经256分频得到clk1（195KHz）作为ADC0809转换工作时钟-Based on VHDL language, to achieve simple control of ADC0809. ADC0809 no internal clock, an external 10KHz ~ 1290Hz clock signal, where
OpenCore
- OpenCores的所有开发文档集合，包括网页版本-OpenCores collection of documents of all development, including web version
open8_urisc_latest.tar
- opencores urisc code
t51_latest.tar
- opencores 上最新的的t51 8051的内核源码-opencores the t51 8051 on the latest kernel source
avr_hp_latest.tar
- opencores 上最新的avr 内核-avr opencores the latest kernel
decoder_latest
- mp3 decoder in vhdl from opencores
nova_latest
- h.264完整的解码器，用verilog实现，属于opencores-h.264 full decoder, implemented by verilog, one of opencores
8051
- 8051单片机的verilog代码，来自opencores网站-8051 verilog code from opencores website
ethmac
- 以太网的verilog代码，来自opencores网站。-Ethernet verilog code from opencores site.
i2s_interface
- iis的verilog代码，符合iis协议标准，来自opencores网站。-iis the verilog code, in line with iis protocol standards, from opencores site.
Opencores_i2c
- 该程序主要详细描述了I2C的功能verilog实现,对学习verilog和I2C有很大帮助-The main program features a detailed descr iption of I2C verilog implementation of the study of great help to verilog and I2C
cf_fft_latest.tar
- This a code for FFT in VHDL, Verilog & C Source: OpenCores.org-This is a code for FFT in VHDL, Verilog & C Source: OpenCores.org
i2c_latest[1].tar
- I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange between devices. It is primarily used in the consumer and telecom market sector and as a board level communications protocol. The OpenCores I2C Mast
8051_latest.tar
- 8051 Rev 0.2 OpenCores VHDL core with testbench
spacewire_src
- opencores上的关于spacewire的初级源码，已经通过板上实验，但是工程应用有待完善，可以作为设计人员的设计参考-opencores on spacewire on the primary source, the board has passed the test, but the engineering applications need to be improved, can be used as design The design reference staff