搜索资源列表
shiboqixianshi
- 用总线方式的示波器显示，是汇编程序，可以与fpga结合。-Oscilloscope display with the way the bus is the assembler, you can combine with fpga.
dso
- 用FPGA设计的数字示波器，有详细的设计过程、论文和硬件原理图-Digital oscilloscope with the FPGA design, detailed design process, paper and hardware schematics
cpld
- 用FPGA实现简易数字示波器，分频，触发，以及，计数-FPGA implementation using simple digital oscilloscope, frequency, trigger, and, counting
dso
- 基于fpga的简易数字存储示波器设计，包含采样，检测触发，波形存储等模块功能-Fpga-based design of simple digital storage oscilloscope, including sampling, testing the trigger, waveform storage module functions
sbqzh_09_improve06
- 利用FPGA开发制作示波器，该程序为FPGA部分程序，配合单片机控制程序可实现简易示波器功能。-Make use of FPGA development scope, the program for the FPGA portion of the program, the program can be realized with the simple single-chip control oscilloscope function.
shiboqidianqicanshusheji
- 示波表中电气参数的设计，基于FPGA设计，转载-Storage oscilloscope in the measurement of electrical parameters commonly used in the design, FPGA-based designs- reproduced
shouchishiboqi
- 手持式存储示波表中的数据采集设计。以ARM和单片机为主辅，FPGA/CPLD为逻辑平台-Handheld storage oscilloscope table data acquisition design. ARM-based microcontroller and secondary, FPGA/CPLD logic platform
equivalent_sample----vhdl
- 基于FPGA的数字示波器的整体设计与实现的各种方案，采用等精读测频率，数据的采集等多项技术的分析-FPGA-based digital oscilloscope of the overall design and implementation of various programs, such as intensive use of the frequency measurement, data collection and many other technical analysis
AD_store
- 利用FPGA，实现高速AD存储示波器功能。高效，实用。-Using FPGA, high-speed AD storage oscilloscope function. Efficient and practical.
FPGA_Oscilloscope
- 基于的fpga的示波器硬件电路系统。详细的给出来示波器系统的电路结构。-Based on the FPGA oscilloscope hardware circuit system. Detailed give out oscilloscope system circuit structure.
wave(last)
- 基于FPGA的示波器，可以调频，调幅，长生漂亮的波形-FPGA-based oscilloscope, FM, AM
BasysRevEBist
- basys板描述介绍信号发生器在科研以及生产实践领域有着广泛的应用。传统的信号发生器通常是通过 模拟电路的振荡、变换得到各种信号。由于模拟器件以及模拟电路自身的局限性，其发展已 经遇到了瓶颈。直接数字- kind of digital WaveGenerator and Oscilloscope based on tne BASYS experiment board which has a Xilinx Spartan-3E FPGA on it.This design can make
FPGA_OSC
- 讲述了如何用FPGA设计示波器的资料，以及要注意的问题-Tell you how to design oscilloscope with FPGA, and pay attention to the problem
VGA_CHAR_WAVE
- FPGA 示波器，使用 digilent 的 nexys2 板子。可以在 VGA 显示器上显示波形及字符。AD 为 60M 采样频率 8bit 的 ADS830E 。-The FPGA Oscilloscope, use digilent, the nexys2 board. Waveform can be displayed on a VGA monitor and character. The AD for 60M sampling frequency 8bit ADS830E.
CooperativeCommunication
- 1. 研究空时分组码的编译码原理及算法； 2. 研究了几种不同的协作分集系统模型和协作分集协议； 3. 将空时分组码编译码器与协同通信用硬件描述语言Verilog实现，并在ISE集成环境中综合仿真，结果正确后下载到FPGA电路板上； 4. 用示波器观察输出数据是否正确，验证空时分组码协同通信的性能。 -1. Decoding Principles of space-time block codes and algorithms 2. Study several differen
sbq
- 基于fpga和传统示波器工作方式的vhdl程序，通过ad0809采样信号（可兼容tlc5510）再经由8位da转换输出，同时输出外触发锯齿波，建议使用感性小的示波器探头，否则锯齿波低频时会出现失真-Fpga-based and traditional ways of working oscilloscope vhdl procedures, through ad0809 sampling signal (compatible tlc5510) and then through eight da
UCGUI_shiboqi
- 提出了一种基于UCOS和UCGUI的数字存储示波器的软件时序逻辑状态机实现技术，硬件上采用FPGA+ARM的 结构，充分利用FPGA在逻辑控制、高速信号采集方面的优势，以及ARM核心在LCD波形刷新、人机接口以及通信协议处 理的灵活性，在提高系统整体性能和可靠性的同时简化了系统的软件和硬件结构。-UCOS proposed based digital storage oscilloscope and UCGUI software sequential logic state machin
zxb
- 利用VHDL语言编程产生正弦信号，熟悉介绍了LPM_ROM与FPGA硬件资源的使用方法，包括仿真和资源利用情况了解，包括SignalTap II测试、FPGA中ROM的在系统数据读写测试和利用示波器测试。完成了配置器件的编程。-Using VHDL language programming sinusoidal signal, using the method described LPM_ROM familiar with FPGA hardware resources, including s
sin_rising_judge
- 这是用vhdl编写的正弦波触发程序，用单片机和fpga做示波器时，可以参考一下这个触发程序。-It is written by vhdl sine trigger when MCU and fpga do oscilloscope, you can refer to the trigger.
fre(1000hz)
- 基于FPGA的频率发生器，晶振频率为48MHZ，输出频率为1000Hz，经过示波器检测，实际测得频率999.988HZ，误差在0.0012 -FPGA-based frequency generator, the crystal frequency is 48MHZ, the output frequency of 1000Hz, through the oscilloscope, the actual measured frequency 999.988HZ, error 0.0012