搜索资源列表
ofdm_cp_insertion_v71
- Quartus公司的实例VHDL源码，用于OFDM的循环前缀的插入操作，很具有指导意义。其中， Quartus的版本必须为7.1以上-ofdm_cp_insertion
cepin
- 基于等精度测频法的频率计测频模块，用VHDL 编写，在QUARTUS里面编译成功的-Such as precision frequency measurement method based on the frequency meter measuring frequency module, using VHDL written inside the compilation of success in the QUARTUS
f_adder_4bit
- 四位二进制全加器，用原理图输入的形式实现，在Quartus II 5.1下编译通过。-4 binary full adder, with schematic input in the form of implementation, compiled in the Quartus II 5.1 adoption.
DE2_SD_Card_Audio
- DE2 sopc系统的一个经典应用，希望能够对大家有一定得帮助-DE2 sopc a classic application of the system, hoping to get help to all of us have a certain
Avalon_VGA
- vga显示彩色图像ip，alter开发板-vga display color image,vhdl,quartus
dianzibiao
- 实现了简单的电子表功能，是24小时，用VHDL所编写的，quartus ii 7.2-To achieve a simple spreadsheet functions, is 24 hours, using VHDL prepared, quartus ii 7.2
pll
- 实现了pll功能，有利于初学者学习pll，采用文本编辑的，利用quartus ii 设计的-Achieved pll function, help beginners learn pll, using a text editor, using quartus ii Design
key_4x4scan_zc
- 实现了4x4键盘功能，有利于初学者学习4x4键盘，采用文本编辑的，利用quartus -Achieved a 4x4 keyboard functionality will help beginners learn 4x4 keyboard, using a text editor, using quartus ii
xianshi_lcd_0
- 实现了lcd1602显示的功能，可以在lcd上显示“年”字，有利于初学者学习lcd在fpga上显示，采用文本编辑的，利用quartus ii 702-Achieved lcd1602 display function, you can lcd display " " The word will help beginners learn lcd display in the fpga, using a text editor, using quartus ii 702
BLDCM
- 基于Verilog HDL的直流无刷电机控制程序，Quartus II环境下编写。-Verilog HDL for BLDCM Control in Quartus II。
jifenlvboqi
- 为了解决软件无线电通信系统中频采样之后的极大数据量在基带处理部分对DSP计算的压力,常采用多速率处理技术.多速率处理过程中需要使用积分梳状滤波器、半带滤波器和高阶FIR滤波器.在分析了积分梳状滤波器的结构和特性的基础上,阐述了多级CIC滤波器一种高效的FPGA实现方法,该方法的正确性和可行性通过Quartus Ⅱ的时序仿真分析得以验证,实际中可以推广应用.-In order to solve software-defined radio communications system after I
comparator
- Comparator for Quartus
ROM
- 4 bit ROM for Quartus
QII_Simulation_CN
- 很好的quartus软件仿真教程，flash版。-Good quartus software simulation tutorials, flash version.
jiaotongdeng_Verilog
- 十字路口交通灯控制器，是课程的结课设计报告，自己写的verilog语言，在quartus ii环境下仿真，具有参考意义。 -traffic signal controllers and It is a subject design report, written in verilog, quartus ii environment, and can be used with reference.
sdmlbeh
- This code implements the behavioral modelling of mealy type sequence detector to detect the sequence 1010. The code is a quartus project file.
sdmlstruct
- This code implements the structural modelling of mealy type sequence detector to detect the sequence 1010. The code is a quartus project file
sdmrbeh
- This code implements the behavioral modelling of a Moore type sequence detector to detect the sequence 1010. The code is a quartus project file
sdmrstruct
- This code implements the structural modelling of mealy type sequence detector to detect the sequence 1010. The code is a quartus project file
unishift
- An universal shift register performs the following tasks load, right shift ,left shift and parallel load as the selection inputs are 00,01,10,11 respectively. Such a register is implemented here in Quartus.