搜索资源列表
pwm
- 在Quartus 9.0 下实现的PWM IP核设计，周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
quartus9.1
- 9.1版本破解！ 9.1版本破解！ -for quartus 9.1for quartus 9.1for quartus 9.1for quartus 9.1
SPYRAL
- quartus2 9.1版本的破解文件，绝对好用，我正在用。-quartus2 9.1 version of crack files, absolutely easy to use, I was using.
QuartusII9.0crack
- quartus 2 v.9.0 program
DE2_70_CAMERA_V1.0.3
- terasic 5mp camera also quartus 9.1 support
jianfaqi
- 8位减法器，我在quartus 9.0版本上运行正常，大家放心下载-8-bit subtractor, I run the normal version of quartus 9.0, we rest assured Download
20104169105873879
- 主要功能：pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言，使用器件是Cyclone2，应用于其他FPGA时，直接调整管脚即可。-Main features: pci9054 local bus control chip sample program can be used for pci driv
quartus2
- quartusⅡ９．０的安装及使用的详细教程，非常好用-quartus Ⅱ 9.0 installation and use of the detailed tutorial, very easy to use
final
- This Source is Verilog Coding. Made in Altera Quartus 9.0 Service Pack 3. Important, I know not used board.
lcd
- DE2-70开发板的LCD控制程序，能直接在DE2-70上运行。版本是quartus 9.0-DE2-70 development board of the LCD control procedures can be directly run on the DE2-70. Version of quartus 9.0
t12
- quartus 9.0的工程，verilog编写，步进电机控制，可以调速和控制位置.可综合。-Quartus project files are included in RAR file. It s written in verilog HDL ,and the purpose is to control both the speed and position of Stepper motor。And project passed synthesis.
ADSP2011Local
- pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言。-pci9054 local bus control chip sample program can be used for pci driver and application testing. Generate an interrupt at r
PCI_Verilog
- Verilog 实现 PCI 转 LocalBus。已在Quartus 9.0下编译并且上PCBA验证通过。-Verilog achieve PCI to LocalBus. Has been compiled in Quartus 9.0 and verified by the PCBA.
ADC0809
- 用CPLD芯片驱动ADC0809模数转换芯片，在Quartus 9.0软件上验证过了-Using CPLD chip driver ADC0809 analog-digital conversion chip, in the Quartus 9 software test.
DS18B20
- Quartus 9.0 ，VHDL语言写的ds18b20 温度测量，1602液晶显示，还有报警功能，开发板用的是EP1C12F3234C8。-Quartus 9, VHDL language to write the DS18B20temperature measurement,1602 liquid crystal display, and the alarm function, development board is used in EP1C12F3234C8
binary-to-BCD-code-converter
- 4位二进制到BCD码转换器 经验证没有错误 在quartus 9.0 的环境下运行 -The four binary to BCD code converter proven there are no errors in the running quartus 9.0 environment
DUAL-PORT-RAM
- vhdl使用双口RAM，工程编译通过。编译工具QUARTUS 9.0。-vhdl using the dual-port RAM, compiled by engineering.
DEMO_N
- FPGA NOISII程序，包含串口，FLASH,SPI等各种接口的程序，由原理图和VERLOG语言混合编写，非常适合初学者，开发环境为QUARTUS 9.0，芯片为EP2C208QC8N-The the FPGA NOISII program, including serial, FLASH, SPI, interface program, the schematic and VERLOG language prepared by mixing, ideal for beginners, de
MMUMPU
- qsys with mmu mpu. Design in SOPC quartus 9.0
QuartusII91_
- quartus 9 "solution"