搜索资源列表
RS232-for-vdhl
- RS232通讯VHDL源代码,MAXPLUS 2环境执行通过-RS232 communications VHDL source code, Segments 2 environment through implementation
rs232_send
- rs232 vhdl程序 可以实行异步串行通信,这里只有send-rs232 vhdl procedures implemented asynchronous serial communication, here only send
uart_vhdl_lattice
- UART的rs232通信接口VHDL语言，里面有详细的介绍-UART communication interface rs232 VHDL language, which is described in detail
rs232
- this is a vhdl version of MiniUART implementation
RS232
- quatus II 环境下vhdl实现RS232功能
RS232
- 基于VHDL的RS232通讯程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用
RS232uart(VHDL)
- 256字节深度的RS232串口程序,共分4个模块,顶层文件\\FIFO程序\\串口收和串口发.经过测试已用于产品.可靠!
vhdl
- RS232数据发送器,适合于VHDL的初学者参考-RS232 data transmitter, suitable for beginners VHDL reference
RS232
- 用硬件描述语言VHDL进行串行通信接口电路设计，能通过RS232协议与PC机进行通信。-VHDL hardware descr iption language used for serial communication interface circuit design, through the RS232 protocol to communicate with the PC unit.
mmu_uart
- uart RS232 VHDL Code
uart
- 串口通讯rs232,时钟频率为40Mhz,波特率为19200,没有奇偶校验,在xilinx XC3S200A板子上验证过.-Serial communication rs232, clock frequency of 40Mhz, the baud rate to 19200, no parity, in the board on xilinx XC3S200A verified.
TopLevelRS232
- TopLevel Rs232 VHDL code
uart01
- 一种实现计算机接口rs232与FPGA通信的基于VHDL语言设计的一段非常简洁的程序-A RS232 computer interface implementation with FPGA-based VHDL language communications designed a very simple procedure
rxd
- VHDL语言写的UART通信接收端程序，适用于RS232协议-VHDL language the receiving end of the UART communication procedures, applicable to RS232 protocol
uart_zhiwen
- RS232的UART编程，包括波特率发生器模块，串口接受模块，串口发送模块-RS232 programming the UART, including the baud rate generator module, serial module to receive, send serial module
rs232
- 在FPGA上实现数据的串口传送，可以和上位机进行数据的首发，里面包含的仿真过程-Realized in the FPGA serial data transmission, data can be the starting PC, which contains the simulation
rs232
- 用vhdl实现fpga串口通信 包含 波特率生成 发送模块 接收模块 过采样 signaltap使用-Vhdl fpga serial communication with the realization of sending module contains the baud rate generation receiver module using oversampling signaltap
RS232
- EP2C8Q208_Quartus_V8.0 基于FPGA实现RS232 VHDL代码-EP2C8Q208_Quartus_V8.0 FPGA-based implementation RS232 VHDL code
RS_232
- VHDL实现RS232串口通信，压缩包内有完整的quartus2工程，由顶层，波特率，发送，接收四个模块构成。外部电路只需要一片MAX232就能与串口助手或单片机通信。-VHDL implementation of RS232 serial communication, compressed within a complete quartus2 project from the top, baud rate, send, receive four modules. External circui
rs485
- communication rs232 in vhdl with clock divider, counter, buffer, rs232tx, rs232rx.