搜索资源列表
ddr_code
- 基于FPGA的DDR SDRAM控制器的VHDL硬件描述语言-FPGA-based DDR SDRAM controller VHDL hardware descr iption language
DDRSDRAM
- 用vdhl编写的DDR sdram控制器，采用模块化编写，条理清楚，注解详细，附有存储器的说明。-the ddr sdram controller base vhdl
SDRAMcontrollerdesignl
- The SDRAM Controller module makes you control SDRAM conveniently with easy interface input type
the_design_and_realization_of_DDR2-SDRAM_controlle
- ddr2控制器的设计与实现,详细介绍了其结构和思想-the design and realization of DDR2-SDRAM controller
sdramc_vhdl
- Xilinx提供的SDRAM控制器参考设计（VHDL)-SDRAM controller reference design (VHDL) designed by Xilinx
SDRAMcontrol
- 用VHDL编写的SDRAM控制器，能实现SDRAM的读写控制及片选。-Prepared using VHDL SDRAM controller, able to SDRAM read and write control and chip select.
52K_19200_1_2010.02.08.16.06.44_4247_KO[1].pdf.zi
- DDR3 SDRAM datasheet please refer want to development DDR3 Controller
sdram_initializer
- sdram模块控制功能，读取nop的sdram的机器- This module takes care of write, read and NOP state machine of SDRAM controller
sdram_vhd_134
- Design Descr iption: The SDRAM controller is designed for a Virtex device. It s simulated with Micron SDRAM models. The design is verified with backannotated simulation at 125MHz. For a full functional descr iption see Application Note 134: h
1122
- 已经成功的FPGA 控制的SDRAM控制器代码.只要修改你需要的宽度-FPGA has been successfully controlled by SDRAM controller code. As long as you need to modify the width of
DDR-SDRAM
- 本应用指南描述了在 Virtex™ -4 XC4VLX25 FF668 -10C 器件中实现的 DDR SDRAM 控制器。该实现运用了直接时钟控制技术来实现数据采集，并采用自动校准电路来调整数据线上的延迟。-This application note describes a Virtex ™ -4 XC4VLX25 FF668-10C to implement the DDR SDRAM device controller. The clock control to ach
FPGA
- 基于FPGA 的SDRAM 控制器的设计方法，使用该方法实现的控制器可非常方便地对SDRAM 进行控制。-FPGA-based SDRAM controller design method, using the method of the controller can easily control the SDRAM.
source
- SDRAM控制器源代码，是ALTERA公司的IP源核，很好很强大-SDRAM controller source code, very very strong
simulation
- SDRAM控制器，ALTEAR公司的IP原核的testbech,很难得-SDRAM controller, ALTEAR' s IP pronuclei testbech, hard to come by
sdr_sdram_altera
- ALTERA的SDRAM的控制器和时序文档说明，很详细也很简洁，是一份不可多得的SDRAM开发的参考文档-ALTERA and timing of the SDRAM controller documentation, very detailed but also very simple, is a rare development of reference documentation SDRAM
DDR_SDRAM
- SDRAM控制器的相关源程序代码 有需要的同学可以下载-SDRAM controller source code related to students in need can be downloaded
sdram_vhdl
- DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的。-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good.
smdk2413_application_note_rev10
- SMDK2413 (Samsung MCU Development Kit) for S3C2413X is a platform that is suitable for code development of SAMSUNG s S3C2413X 16/32-bit RISC microcontroller (ARM926EJ-S) for hand-held devices and general applications. The S3C2413X consists of 16-/32-
sdram_access
- sdram 控制器，VHDL程序源代码。-sdram controller,vhdl program
DDR3_user_design
- 在Xilinx开发环境ISE13.2上用MIG产生的DDR3 SDRAM控制器，里面生成了Core，可用于DDR3读写控制-On the Xilinx development environment ISE13.2 generated with MIG DDR3 SDRAM controller, which generates the Core, DDR3 can be used to read and write control