搜索资源列表
SDRAM-control-SOPC
- sdram 控制器的sopc搭建 sdram 控制器的sopc搭建 -sdram controller the sopc build sdram controller sopc structures the
DDR-SDRAM
- ddr sdram 控制器的源代码，内有vhdl和verilog。-DDR SDRAM controller
sdram
- 自己做的一个SDRAM控制器，供大家参考啊！-Own a SDRAM controller for your reference!
sdram
- sdram控制器的Verilog描述 测试可用-the sdram controller Verilog descr iption of test available
modelsim-sdram-sim
- 包括sdram 测试平台，sdram控制器，sdram行为模型。-Includes sdram testbench, sdram controller, sdram behavior model.
SDRAM
- DE2 SDRAM Controller Pin Configuration Set-DE2 SDRAM Controller Pin Configuration Set!!!
SDRAM
- 用Verilog HDL语言编写的SDRAM控制器，在DE2-70的开发板上实现。-SDRAM Controller with Verilog HDL language, DE2-70 development board.
ddr-sdram-control
- ddr sdram控制器的设计与验证，提供了一种极为可靠且简易的控制器设计方案。-DDR SDRAM controller design and verification, providing an extremely reliable and simple controller design.
SDRAM
- Verilog HDL 语言构建SDRAM 控制器的详细方案设计-SDRAM controller Verilog HDL language construct detailed program design
DDR3-SDRAM-Controller
- DDR3的控制器（并带有Testbench），可烧录到FPGA中对内存进行读写，相关技术人员可在该代码上修改用于其他场合-DDR3 controller (with an Testbench), the FPGA can be burned to the memory read and write, the relevant technical staff can modify the code to be used on other occasions
SDRAM
- SDRAM controller: it contains a SDRAM controller writtern in verilog language. It is a interface between microprocessor and SDRAM device.
SDRAM 控制器的部分源代码
- SDRAM 控制器的部分源代码，希望能有所帮助-SDRAM controller logic，only a part
DDR3-SDRAM-controller
- My package named design DDR3 Synchronous Data Random Access Memory by verilog.The memory controller is a digital circuit which manages the flow of data going to and from the computer s main memory.
SDRAM-Controller-Core-n2cpu_nii51005
- 关于sdram的fdp文档，希望对你学习有用-about sdram fdp file，hope will help you
SDRAM
- SDRAM控制器的VHDL语言描述及仿真-SDRAM controller
SDRAM-control
- 使用FPGA实现的SDRAM控制器访问代码，该代码的时序参数可调整-SDRAM controller FPGA implementation using the access code, the code is adjustable timing parameters
SDRAM
- 使用VHDL语言编写的对SDRAM进行读写操作控制器及其简单的测试层序。(VHDL language used to read and write operations controller SDRAM and its simple test sequence.)
DDR_MO
- 使用verilog语言实现简单的DDR SDRAM控制器(Using Verilog language to achieve a simple DDR SDRAM controller)
SDRAM_ctrl
- sdram controller in vhdl
标准SDR SDRAM控制器参考设计，Lattice提供
- 说明： SDR SDRAM 控制器 来自lattice 已经分析代码可用!大家可以参考修改，形成自己的实例(Descr iption: SDR SDRAM controller from lattice has been analyzed code available, we can refer to modify, to form their own examples)