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Xilinx Ise
官方源代码盘 第四章-Xilinx Ise official source code-Chapter IV
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N位加法器源代码,通用的,通过xilinx验证,希望对大家有用。-N-bit adder source code, a common, through Xilinx certification, useful for all.
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Xilinx Jtag Configuration source code, Support *.xsvf file-Xilinx Configuration source code, Support xsvf file *.
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基于Xilinx PicoBlaze处理器内核的系统 源代码-based Xilinx PicoBlaze processor system source code
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1024点FFT快速傅立叶变换,包含说明文档和VHDL源代码,16位输入/输出,带DMA功能,xilinx的ip-1024-point FFT fast Fourier transform, and includes documentation, VHDL source code, 16 input / output, with DMA function, the ip xilinx
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用FPGA模拟VGA时序、模拟PS/2总线的键盘接口VHDL源代码,基于Xilinx spartan3-VGA FPGA timing simulation, simulation PS / 2 keyboard interface bus VHDL source code, Based on Xilinx spartan3
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这个是Xilinx编程的源码,是Bristol大二时写的.-Xilinx is the programming source code, is sophomore at Bristol writes.
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xilinx的SPARTAN-3E入门开发板实例
根据官方公布的led移动范例改写。
原范例仅提供了源代码、烧写文件以及dos窗口下使用的烧写bat文件。
本实例采用了ise7.1i创建,在ise下重建整个工程,有助于初学者理解使用。-xilinx the SPARTAN-3E portal development board examples According to the official announcement led to the mobile Examples rewr
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ddr2 controller, verilog source code from xilinx
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这是我自己写的4人表决器源码,在xilinx Spartan3E 上已经调试成功,拿出来与大家分享!-that I wrote four voting machine source code, In xilinx Spartan3E debugging has been successful, with the show to share with you!
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xilinx提供的频率发生器的VHDL源码,可以运行在spartan3的学习开发板上。-xilinx the frequency generator VHDL source code, spartan3 can run in the learning development board.
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xilinx fpga 做VGA驱动信号的Verilog原代码,ise版本9.2,,xilinx fpga do VGA driver signals Verilog source code, ise version 9.2,
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在Xilinx Spartan-3E的开发板中,实现键盘和VGA显示器的通信的源代码,与大家分享:,In the Xilinx Spartan-3E development board, the realization of the keyboard and VGA display the source code of communication to share with you:
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source code demo led microblaze
xilinx xc3s100etq144-4
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关于xilinx
大学培训教程实验5源代码-Tutorial on the Xilinx university training experiment 5 source code
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关于xilinx大学计划配需教程实验五源代码-Xilinx University plans with regard to the need tutorial experimental five-source code
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xilinx 的 picoBlaze 的编译器kcpsm3,包括3个生成代码的模版文件,-Xilinx PicoBlaze compiler of kcpsm3, including three generate code template file,
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基于Xilinx Vertex4的可综合的二级DCM模块源代码,可生成400Mhz时钟信号-Based on Xilinx Vertex4 of two integrated DCM module source code, can generate 400Mhz clock signal
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采用FPGA实现色彩空间转换R’G’B’ to Y’CbCr的VHDL和verilog源代码,支持xilinx的各种器件.
-FPGA realization of the use of color space conversion RGB to Y CbCr of VHDL and Verilog source code, to support a variety of Xilinx devices.
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xilinx DCM 应用的源代码,完全可用-xilinx DCM application source code, fully available
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