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meanFilter
- This is a variable length window averaging filter that uses an MCP3002 ADC with SPI interface to sample an analog input, and has a PWM that can be run through a low-pass filter to produce an analog output. The design was simulated in Modelsim with no
spi_verilog
- spi接口的verilogHDL编码，用于fpga与单片机的spi总线通讯-spi interface verilogHDL coding
ADC
- a verilog code about dac of audio codec on fpga board.
CoreSPI
- 数字电子设计fpga设计的spi接口的ip_core，可以直接用于在fpga设计，支持actel的fpga芯片，支持主从模式，fifo大小可选。-Fpga design of digital electronic design spi interface ip_core, fpga design can be directly used to support actel the fpga chip, support master-slave mode, fifo size options.
spartan3e_test
- Drive for ADC-DAC POR FPGA SPARTAN 3E STARTER KIT
FPGA-contronl
- 单片价c8051与FPGA的SPI接口通信，近端机与光口通信控制-Price c8051 and the FPGA-chip SPI interface communication, the proximal port communication control unit and light
spi
- 关于单片机c8051f020与fpga之间通信的程序-Fpga on communication between the microcontroller and the program
Altera-memory
- 这个软件是altera 芯片对SPIflash的一个控制程序，里面读写测试已经通过。-spi flash code for VHDL
SPI
- fpga 模拟spi 通讯SPI 的功能介绍及升级初步设想-arm and fpga
FPGA_SPI_VHDL
- 串行外设接口（SPI）fpga 被动接收,在下降沿 采集数据并发送数据 1BYTE,要求mcu在末端采集数据。并在下降沿之前准备好数据。-Serial Peripheral Interface (SPI), The fpga passive receiving, at the falling edge of data collection the send data 1BYTE, mcu data collected at the end. And the data ready before t
SPI
- 利用Verilog来实现SPI接口，可以实现FPGA与单片机的通信。-SPI Verilog
fpGA based-system-design
- 基于FPGA系统设计 本案例利用ALTIUM设计一个数字可控的混响系统，在这个系统中将把MIPS处理器、 IIS 控制器、SPI控制器、SRAM控制嵌入到FPGA内部实现图1的功能结构。 -FPGA-based system design This case the use of the ALTIUM design a digital controlled reverberation system, MIPS processors will be in this
Verilog-SPI
- 用FPGA实现SPI通讯，使用VerilogHDL语言编写，附相对应的MCU端时钟配置注意事项-Using FPGA implements SPI communication, Code use VerilogHDL language, attached corresponding to the MCU side clock configuration Note
spi
- spi时序控制程序。在fpga中，数据传输等都会由spi进行与主控的交换，此程序用于在数据传输中spi部分的时序控制等。-The spi Timing control procedures. In fpga, data transmission, and will by spi master exchange spi part of this procedure is used in the data transmission timing control.
spi
- spi协议 用verilog 编写 可以在xilinx fpga板子上 ise软件-spi protocol written in verilog in xilinx fpga board ise software
SPI
- spi master code for fpga quartus altera
SPI-verilog
- spi master code for fpga quartus altera
spi-dac-with-spartan-3e-fpga
- DAC details has been given for FPGA
fpga-spi-to-uart
- FPGA的SPI转多路UART / 485-spi to uart or 485
spi
- FPGA实现spi自发自收，verilog代码-FPFA spi verilog