搜索资源列表
DDR_FLASH_VHDL_Verilog
- FPGA DDR 外部RAM 读写的verilog代码，以及FLASH的vhdl代码-DDR SRAM READ AND WRITE VERILOG CODE ,FLASH VHDL CODE ,FPGA
vga_card
- VGA模块的VHDL代码和软件驱动，可作为外设挂接在Avalon总线上。用一块SRAM作为显存，双缓存切换模式。-VGA module VHDL code and software drivers can be articulated as a peripheral bus in Avalon. As with a piece of SRAM memory, dual-mode cache switching.
SRAM_controller
- 对于想编写sdram控制器的人来说，值得借鉴-Sdram controller would like to prepare for the people, to learn
VHDLSourceProgramofReadDAatasFromSRAM
- 从SRAM中读取数据并显示的VHDL源程序，了解串口通信的基本原理，了解VGA现实图像的方法和原理。-VHDL Sorce Program of Read Datas From SRAM
ZBTSRAM
- 高速同步SRAM控制器参考设计VHDL代码-High-speed synchronous SRAM controller reference design VHDL code
SRAM_16Bit_512K
- VHDL语言写的SRAM控制程序，在开发板上验证过。-Written in VHDL SRAM control procedures, the development board verified.
040402~~
- 虽然与SRAM相比，SDRAM需要额外的控制逻辑，有更复杂的时序要求，需要定时刷新，但是由于SDRAM具有单位空间存储容量大和价钱便宜的优点，因而被许多的嵌入式开发者所青睐。为此，针对这种情况，必须设计SDRAM控制器。为了降低系统成本，本课题采用FPGA技术，并使用VHDL语言研究了FPGA与SDRAM的存储器接口实现问题。-Abstract In order to expand the SDRAM’S storage capacity of the TS一101 processor，a me
cy7c199_10vc_vhdl_10
- 8位32K的SRAM防真模型，VHDL语言编写-Anti-32K of SRAM 8-bit true model, VHDL language
SDRAM_ctrl
- 基于DE2的SRAM驱动，带测试程序。用VHDL语言编写。-sdram drive
cy62127vll_70bai_vhdl_10
- SRAM CY62127DV30LL. vhdl model
XAPP147_SRAM_TEST
- XAPP147 SRAM TEST VHDL code
USE_FSM_DEDIGN_SRAM
- 用FSM（有限状态机）设计SRAM的VHDL语言-With the FSM (finite state machine) design of the VHDL language SRAM
SRAM_1wait
- The aim of this vhdl file is to create a simple interface betwhen the sram and a basic processor on a semisync data bus. This was made using the test board DE2 from Altera.
5t
- sram design is it,u can see its easy ,so i upload it here my frnds it is useful code see this it is in vhdl language
sram_simul
- Simple simulation example of SRAM in VHDL and Xilinx ISE
sram_vhdl
- 基于vhdl的sram读写访问程序，经过前后仿真及板上实际测试-failed to translate
serial
- 用VHDL测试代码进行存储器读写测试，使用元件例化的方法-experiment of visiting SRAM using the means of components
ram
- SRAM 静态存储器 vhdl代码 计算机组成原理-SRAM is a memory
VHDLSDRAMcommand.vhd
- 基于fpga的实现sram控制器的vhdl源代码，非verilog-sram controller VHDL source code
SRAM_FPGA
- sram缓存数据，用VHDL语言编程，已经验证过！很 好用的！-SRAM cache data, using VHDL language programming, has already been verified! Very good use!