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LEDdisplay
- LED display Code for stopwatch in Verilog
rtcclock_latest.tar
- 国外的时钟以及闹钟和秒表功能的verilog程序,功能完善,具有一定是学习价值-The clock and alarm clock and stopwatch function Verilog program, perfect function, have a certain value of learning
clock
- 原创数字钟verilog程序,能实现数字钟基本功能,如:计数,跑表,定时,闹钟。用于ISE软件。-Original digital clock verilog procedures, to achieve the basic functions of digital clock, such as: counting, stopwatch, timer, alarm clock.
paobiao
- verilog实现数码跑表,基于ALTERA DE2—70开发板实现验证,其中代码不分模块。-verilog achieve digital stopwatch, to achieve certification based ALTERA DE2-70 development board, regardless of where the code module.
try1
- 电子钟设计,verilog语言编写,拥有数秒和计时两个主要功能-4 bit digital clock, might function as a stopwatch
Clock-generator
- 采用Verilog HDL语言编写的多功能数字钟,包括四个功能:时间显示与设置、秒表、闹钟、日期显示与设置-.-Using Verilog HDL language multi-functional digital clock, including the four functions: time display and settings, stopwatch, alarm clock, date display and settings
timer
- 使用Verilog编程的秒表,使用basys2板子,同时支持两个秒表计时,有暂停复位功能,计时在七段数码管上显示。-Using Verilog programming stopwatch, use basys2 board, while supporting the two stopwatch with pause reset function, time on the seven-segment LED display.
second2
- basys3板子的Verilog环境下的秒表源代码-stopwatch basys3 Environment
miaobiao
- 在Quartus II 环境下利用Verilog语言编写的秒表程序,包含模块化器件和仿真波形-In the Quartus II environment, use Verilog language stopwatch procedures, including modular devices and simulation waveforms
miaobiao
- 用硬件描述语言Verilog HDL完成秒表设计模块,使用数码管。-Using hardware descr iption language Verilog HDL to complete the stopwatch design module, using digital tube.
baseonFPGAclock
- 用verilogHDL语言写的基于FPGA的电子钟。里面包含闹钟、秒表、日历、时间设置等功能,可用LCD显示-verilog language, implemented on the FPGA alarm clock, calendar, time display, stopwatch in one of the electronic clock and calendar. Can be displayed on LCD
shuzipaobiao_all
- VErilog源码,数字跑表数码管显示,按键控制-VErilog source, digital stopwatch digital display, control buttons
boomshakalaka
- Verilog实现数字钟,超多功能,移位显示,闹钟设置,移位设置时间,定时秒表,控制LED记录数值等-Verilog digital clock, ultra-versatile, shift display, alarm settings, set the time shift, the timing stopwatch, and other numerical control LED record
miaobiao7
- 秒表计数(verilog)可以实现百分秒,秒,分的计数60进制,可以暂停,复位(Stopwatch count (Verilog) can achieve 100 seconds, seconds, the count is 60 hexadecimal, you can pause, reset)