搜索资源列表
I2C_Controller
- Verilog 硬件描述语言的 I2C收发控制器程序-Verilog hardware descr iption language, I2C transceiver controller program
fpgaai2c
- 包含I2C协议说明及运用verilog实现读写I2C器件功能-IT contains I2C protocol instructions and use verilog to achieve functional literacy I2C devices
verilog_EXAMPLE_100-
- 产用的Verilog语言设计实例，适合初学者，代码通过验证。包含PCI、i2c等-Production design example Verilog language, suitable for beginners, through the verification code.Contains the PCI, i2c, etc
i2c_slave
- 使用verilog语言实现I2C Slave功能模块，带有地址匹配和8位寄存器和8位数据读写。-verilog HDL I2C Slave function module with address matching and eight 8-bit data registers and write.
i2c_slave
- I2c slave 16 bit data verilog 代码-i2c slave verilog code
FPGA_51
- 51+FPGA架构的通讯口扩展,用verilog语言编写，扩展了Ｉ２Ｃ，ＳＰＩ，ＲＳ２３２。-51+ FPGA architectures communication port expansion, with verilog language, extends the I2C, SPI, RS232.
I2C_Single_Master
- I2C Single master written in Verilog Libero Designer core generator.-I2C Single master written in Verilog Libero Designer core generator.
iic_wr
- 使用Verilog完成对I2C总线的读写操作，已经经过测试，工程可直接使用。-Using Verilog complete I2C bus read and write operations, has been tested and works can be used directly.
i2c_slave
- Verilog实现的i2c从设备仿真模型，只需修改控制码就可直接使用，自用-Verilog implementations i2c slave device simulation models, simply modify the control code can be used directly, for personal use
I2C_Controller
- I2C控制程序，verilog语言编写，包括数据 时钟控制-the program of IIC control
e2prom_rd
- 该verilog代码用于E2PROM操作运用，用于I2C时序操作，存储数据-Operation is applied, the verilog code used in the E2PROM chips was introduced for I2C timing operation and store data
i2c_timing_ctrl
- I2C总线时序控制的verilog i2c_timing_ctrl-Verilog i2c_timing_ctrl I2C bus timing control
iic_100k
- 用verilog HDL语言描述的i2C总线程序-a iic_100k program using a verilog HDL
iic
- i2c接口的功能实现代码，用VERILOG编写，并附有testbench.-i2c interface function implementation code, written in VERILOG, along with testbench
NiosII_I2C_bus
- 采用altera公司EP3C系列芯片实现的基于Nios II的I2C总线设计，采用Verilog编码-Altera company EP3C using the Nios II series chip I2C bus-based design using Verilog coding
OV7725_i2c_timing_ctrl
- iic接口verilog HDL代码，经过测试验证，在OV7725控制接口上验证- //i2c interface output i2c_sclk, //i2c clock inout i2c_sdat, //i2c data for bidirection //user interface input [7:0] i2c_config_size, //i2c config data counte output reg [7:0] i2c
i2c_slave_model
- FPGA I2C i2c_slave_model code verilog
wb_master_model
- FPGA I2C主机FPGA代码 verilog-FPGA I2C host FPGA code verilog
I2c_opencores_v13.0
- i2c opencores module for Altera Avalon bus. Verilog.
i2c_master_top
- I2C控制总线的顶层描述verilog代码，选项中没有verilog语言，故选择VHDL-The function descr iption of I2C bus top level