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PCMsignal
- VHDL编程的PCM码流时隙信号模块，完整地quartus工程文件，可直接运行。-PCM by VHDL
8253
- 8253计数器接口电路 intel8253是NMOS工艺制成的可编程计数器/定时器，有几种芯片型号，外形引脚及功能都是兼容的，只是工作的最高计数速率有所差异-8253 counter interface circuit
5
- VHDL常用模板之与门、或门。。超实用！vhdl编程必备-VHDL templates of commonly used with the door, or door
tlc5615
- TLC5615串行DA的驱动接口,采用verilog编程-TLC5615 driver DA serial interface using verilog programming
fir_lms
- 基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
vga_game_demo
- 乒乓球游戏，基于Xilinx板子，并且有vga IP核，使用EDK进行编程-Table Tennis Games
I2C-Master-_-Slave-Core
- 用verilog 实现的 iic 总线编程，包括master，和slave的编程，很详细的iic总线编程-Iic-bus implemented using verilog programming, including the master, and slave programming, a very detailed iic-bus programming
CyclonePLL
- Cyclone™ FPGA具有锁相环（PLL）和全局时钟网络，提供完整的时钟管理方案。Cyclone PLL具有时钟倍频和分频、相位偏移、可编程占空比和外部时钟输出，进行系统级的时钟管理和偏移控制。Altera® Quartus® II软件无需任何外部器件，就可以启用Cyclone PLL和相关功能。本文将介绍如何设计和使用Cyclone PLL功能。 PLL常用于同步内部器件时钟和外部时钟，使内部工作的时钟频率比外部时钟更高，时钟延迟和时钟偏移最小，减小或调整时钟
traffic-light-PDF
- 交通灯东南西北四个方向的红，黄，绿三色灯的控制方案VHDL编程-Four corners of traffic lights red, yellow, and green lights VHDL programming control program
CHWCNTACORA
- VHDL编程语言设计，显示灯，显示VHDL字样。-VHDL programming language design, indicator lights, indicating the word VHDL.
jianfaqi
- 用硬件描述语言编程实现减法器,实现两个操作数的减法-Using hardware descr iption language programming subtraction, and the achievement of the two operands of the subtraction
8237
- 关于vhdl对硬件接口8237的编程，可以在进行fpga/cpld设计是作为模块用到-VHDL for the hardware interface on the 8237 programming, you can carrying out fpga/cpld design is used as a module
c19_CICfilter
- 精通verilog HDL语言编程源码之5--CIC积分梳状滤波器设计-Proficient in verilog HDL source language programming of 5- CIC Integrator Comb Filter Design
c20_cordic_computer
- 精通verilog HDL语言编程源码之6--CORDIC数字计算机的设计-Proficient in language programming verilog HDL source of 6- CORDIC digital computer design
c23_RS_decoder
- 精通verilog HDL语言编程源码9——RS(204,188)译码器的设计-Proficient in verilog HDL source programming language 9- RS (204188) decoder design
2DImageFilterByVHDL
- 用VHDL语言编程实现2维图像的滤波算法，简单精辟-VHDL programming language used to achieve 2-D image filtering algorithm, simple brilliant
BCD_digit
- 基于Actel的VHDL编程，实现BCD功能源代码-Based on Actel
Triangle_Wave_generater
- 采用vhdl语言编程，基于quartus平台的三角波仿真。-Using VHDL language programming, based on the Quartus triangular wave simulation platform.
PCR
- 本程序是在传输流传输过程中对节目时钟字段进行检测与修改,采用Verilog HDL 语言进行编程。-This procedure is in the transport stream during transmission of program the clock to carry out field testing and modification, using Verilog HDL language programming.
iul
- 8.1 可编程并行接口芯片8255A 8.2 可编程定时器/计数器芯片8253/8254 8.3 串行通信及可编程串行接口芯片8251A 8.4 模/数（A/D）与数模（D/A）转换技术 及其接口 -8.1 programmable parallel interface chip 8255A8.2 programmable timer/counter chip 8253/82548.3 serial communications and programmable seri