搜索资源列表
uart
- 采用VHDL语言编写的串口驱动程序,已调试通过,能够实现同PC机的数据传输,可读性好,可移植性好-VHDL language using the serial driver has been debugged, to achieve the same PC, the data transmission, readable and portable
bpsk
- 基于bpsk的vhdl语言编程与性能仿真-Based on the vhdl language bpsk programming and performance simulation
sine-generator
- 原创:采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成,可产生正弦波。更改rom内容可改变波形-Original: Using VHDL languages sinusoidal signal generator. rom using Quartus LPM s own generation, can produce sine wave. Rom content changes can change the waveform
8B10B
- 基于VHDL的双校验位8B10B编码系统的设计,对于学习VHDL语言有一定的帮助-VHDL-based dual-parity bit 8B10B coding system for learning VHDL, there is some help
256.16-RAM
- VHDL语言编写,实现256×16RAM块功能,稍加修改即可改变RAM块的容量-VHDL language, achieving 256 ×16RAM block .A little change can change the capacity of the block RAM
VHDL_electronic_organ
- 简易电子琴,可以弹奏音乐。本课程设计主要内容是基于VHDL语言并利用数控分频器设计硬件电子琴,利用GW48作为课程开发硬件平台,键1至键8设计为电子琴键。某一个LED显示当前的按键的音节数。-Simple organ, can play music. The main contents of this curriculum design is based on the VHDL language and the use of digital hardware design divider org
USB2.0
- usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
SPI
- VHDL语言编写的SPI通信接口,可实现与单片机等外部MCU的通信,且只占用较少的引脚线-Written in VHDL SPI communication interface, can be realized with the microcontroller and other external MCU communication, and only takes less pin line
key_scan
- FPGA键盘扫描,采用VHDL语言编写的键盘扫描代码-FPGA keyboard scanning, the use of VHDL language keyboard scan code
VHDL38decoder
- VHDL 语言实现 38译码器 文件中包括 程序 源代码 还有 testbench 测试程序-38 decoder VHDL language implementation, including program source code file, there are testbench test procedures
Dac
- 这是一款用VHDL语言编写的对外部DA芯片的控制程序,所用DA转换芯片是TI公司的TLC5615.-This is a VHDL languages used on the external DA chip control procedures, using DA converter chip is TI
CLOCK
- 文通过ALTERA公司的quartus II软件,用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为:计时功能,24小时制计时显示;通过七段数码管动态显示时间;校时设置功能,可分别设置时、分、秒;跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
VHDL-test-codeBooth-multiplier
- VHDL实验代码:Booth乘法器,是一个基于VHDL语言开发的程序,非常的实用-VHDL test code: Booth multiplier, is a VHDL-based language development program, a very practical
adder
- 运用VHDL语言实现四位超前进位加法器。-VHDL language using the four CLA.
median-filter
- 基于FPGA的图像中值滤波算法的优化及实现vhdl-中值滤波 利用VHDL语言实现三级流水线中值滤波-FPGA-based image filtering algorithm optimization and realization of vhdl-median filter using VHDL language three pipelined median filter
encoder
- 此为介绍一光电编码器的学术论文,采用VHDL语言编写,介绍了4分频的实现。-This is the descr iption of the papers of a photoelectric encoder using VHDL language, introduced a 4-band implementation.
CPU
- 八位简单risc cpu 设计的源代码,VHDL语言写的-8 Simple risc cpu design source code, VHDL language written
wannianli
- 采用VHDL语言编写的万年历程序,可在液晶上显示!-Using VHDL language calendar procedures, can be displayed on the LCD!
Coding
- 这是用VHDL语言编写的4位比较器,用了三种描述进行编写-This is the VHDL language with the 4-bit comparator, used to prepare three kinds of descr iptions
fft
- 用VHDL语言来实现256点FFT的算法-256 FFt the VHDL implementation