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这是一个数字钟的VHDL语言,具有调时、调秒、调分功能,同时,还具有十二小时制向二十四小时制切换功能-This is a digital clock in VHDL language, with a tune, the tone seconds and sub-transfer function, while the system also has 12 hours to 24 hours the system switching function
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我学习VHDL的课程设计,是多功能数字钟,有闹钟,秒表等功能,多指教-I learned VHDL course design is multi-functional digital clock, there is an alarm clock, stopwatch functions, multi-Zhi Jiao
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Xilinx clock. DIGITAL CLOCK for Spartan-3
Starter Board. This design shows how to generate a digital
clock and display the output to the multiplexed 7-
segment display in VHDL.
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用VHDL语言编写的带有闹钟功能的数字时钟,可实现定时定点闹钟。-Written in VHDL, digital clock with alarm function can be realized fixed-point alarm regularly.
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vhdl files for alarm digital clock
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a vhdl code for digital clock
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基于VHDL的数字时钟设计课件,简单,实用-VHDL-based Digital Clock Design Courseware
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多功能数字钟,有校时,仿广播报时,整点报时,闹铃等功能!-Multifunction digital clock, there are schools, the fake radio timekeeping, the whole point timekeeping, alarm and other functions!
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多功能数字钟实现闹铃,整点报时,校时,仿广播电台报时功能-multifuntional digital clock written in verilog
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用硬件描述语言实现数字钟的设计,实现正常计时,报整点时数,电台整点报时,12小时制与24小时制转换等功能。其中有代码和仿真结果-Using hardware descr iption languages digital clock design, implement the normal timing, the whole point, the number of newspaper, radio and the whole point timekeeping, 12-hour and 24-h
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这是一个基于FPGA设计的24时多功能数字钟,具有正常星期、时、分、秒计时,动态显示,保持、清零、快速校分、整点报时、闹钟功能。-This is an FPGA-based design of multi-function digital clock 24 hours, with a normal week, hours, minutes, seconds, timing, dynamic display, maintaining, resetting, fast school hours, t
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用于FPGA可编程逻辑器件的VHDL语言编写的6显示数字钟程序。51单片机驱动6个LED数码管。-Digital clock (VHDL language) for FPGA Development
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用vhdl实现的数字钟,具有整点报时,调时功能。-Implemented using vhdl digital clock, with the whole point timekeeping, transfer-time functionality.
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VHDL语言编写的数字钟的模拟程序,可以实现定时,时分秒的显示等-Digital clock written in VHDL simulation process can be achieved regularly, minutes and seconds of display time
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it is the program for VHDL digital clock
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功能:
(1)数字钟(2)数字跑表(3)调整时间 (4)闹钟设置 (5)日期设置。
设计总体构思:
将日期、时钟、秒表及闹钟功能分开实现。选择日期模式,则只显示年、月、日。选择时钟模式,则只显示时、分、秒。选择秒表模式,则只显示秒、毫秒。选择闹钟模式,显示为时、分、秒,另外加一个闹铃。
-Features:(1) digital clock (2) digital stopwatch (3) adjust the time (4) alarm settings (5) date
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该数字钟可以实现3个功能:计时功能、整点报时功能和重置时间功能-The digital clock can achieve three functions: timing function, reset the whole hour and time functions
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FPGA多功能数字钟,描述语言VHDL,软件环境QuartusⅡ-FPGA multi-function digital clock, descr iption language VHDL, Quartus Ⅱ software environment
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数字钟 用VHDL 编写,内含QUARTUSII软件-digital clock
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自己做的基于FPGH的数字钟实现,有调时、复位和暂停等功能。-Do their own realization of the digital clock on FPGH have stressed, the reset and pause functions.
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