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Rom_Control_FPGA
- 用VHDL语言写的ROM控制器,对于编写BUFFER的同志可以用来参考。具有一定价值。-Written in VHDL language using ROM controller, for the preparation of the comrades BUFFER can be used for reference. Has a certain value.
BCD
- ROM vhdl for binary to BCD
rom_control
- 基于vhdl的源代码,主要用于对ron进行操作,是通过读rom的数字实现的-Vhdl source code-based, mainly for the operation of the ron, rom by reading the digital implementation
VHDL_Sample
- VHDL VGA彩条发射器,里面有4个文件,分别是直接输出的,还有通过ROM查找颜色的,通过RAM和DRAM的-VHDL VGA color of the transmitter, there are 4 files, namely, direct output, as well as to find color by ROM, RAM and DRAM through the
sin
- 设计一个正弦信号发生器,用VHDL设计出同步寄存器、相位累加器等,正弦ROM查找表建议采用定制器件的方法完成,正弦ROM数据文件可以用C代码完成。-failed to translate
fangbo
- 关于方波发生器的VHDL代码,用rom表装载数据然后AD转换-Katanami the code generators vhdl
rom_decoder_ram
- 三八译码器 VHDL语言 ROM RAM-Thirty-eight decoder
servomat
- antidad_a EQU s0 talto EQU s1 Rename register sX with <name> tbajo EQU s2 indicador EQU s3 cantidad_b EQU S4 Define constant <name>, assign value name ROM output file generated by pBlazIDE assembler VHDL "ROM_form.vhd", "ser
alu_simulation
- VHDL alu unit design and simulation with RAM, ROM, clock generator and 2 simple programs to execute.
test_cpu
- 自己编的小型CPU,可执行简单的代码,作为对开发CPU的尝试。里面包含ROM和CPU。CPU通过状态机执行指令。在Modelsim中仿真通过。-Small VHDL CPU,as a example for developing CPU. It is simulated by Modelsim.
88VHDL(1)
- 选用一种设计方案定制ROM(乘法器宏模块)的方法设计一个八位乘法器,利用quartus软件进行VHDL程序的编写,然后对程序进行仿真验证,并对所设计的乘法器进行评价。-Use a custom ROM design ( multiplier macro module ) method to design a eight multiplier, the use of quartus software VHDL program, then the program is validated by si
LCD
- VHDL语言由1206显示rom中的数据-VHDL language rom in the data from 1206 show
LIA
- 该vhdl代码用两个rom模拟产生两路正弦波,并设计了一个乘法器将两路正弦波相乘。-The two vhdl code with two rom analog sine wave and design a multiplier to multiply two sine wave.
sin
- vhdl语言写的基于rom的正弦波发生器,包含代码和仿真图-VHDL language used to write rom-based sine wave generator contains code and simulation Figure
DDS
- FPGA,基于VHDL语言,用于ROM查找表的方式,实现DDS,能够输出正弦,方波,锯齿波,方波四种波形,可以改变幅值和频率。-DDS based on FPGA(VHDL)
VHDL-code-of-ROM-Based-Instruction-Memory
- code for 16 bit instruction memory
SIN
- 使用rom生成sin曲线,VHDL实验课上做的实验,适合初学者。-Sin curve generated using the rom, VHDL experimental class to do the experiment, suitable for beginners.
fengming
- VHDL实现蜂鸣器唱歌,已验证通过,音乐文件采用ROM存储。-VHDL implementation buzzer singing, has been verified through.
ise_c8051
- r8051(c8051)IP源码,使用VHDL编写。整个工程通过ISE13.2实现,附带完整testbench,并实例化了rom和ram,可以运行c代码。工程内包含modelsim的仿真脚本,可以观测程序运行时的内部硬件工作情况。-r8051 (c8051) IP source code, the use of VHDL. The whole project is realized by ISE13.2, with complete testbench, and examples of the
8051
- VHDL语言编写的SW8051IP核,并加入ROM,RAM,RAMX,PLL模块,可下载HEX文件并验证成功-VHDL language SW8051IP nuclear and add ROM, RAM, RAMX, PLL modules, you can download the HEX file and verify success