搜索资源列表
YCbCr_RGB_10bit
- YCbCr 转 RGB模块，以应用于项目中。 该模块可将10bitYCbCr分量视频转换为12bitRGB视频，需消耗乘法器。-YCbCr turn RGB module, to apply to the project. The module can be 10bitYCbCr component video converted to 12bitRGB video, need to consume multiplier.
video_formatter
- 数字video BT601格式转换成BT656/SMPTE格式-Digital video BT.601 format converts to BT656 format or SMPTE format.
H.264
- 关于h.264视频解码器完全源码（verilog）-With regard to h.264 video decoder full source code (verilog)
TX
- 1路视频光端机的发射端，VHDL源码，使用全FPGA芯片的硬件，内建成帧、时钟、SERDES-The launch of a video PDH client, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
VGA
- 压缩包中包含了用Verilog编写的视频控制模块，实现PAL制式到VGA制式的实时转换，同时包含了VGA专用ram配置模块，可直接实用-Compressed package includes the preparation of the video with the Verilog control module, PAL format to achieve real-time conversion to standard VGA, VGA also includes dedicated ram
pro_4d1
- 此代码可实现8bits 108M 4路BT656 像素交织输入转为8bits 108M 4路行交织的视频数据，并有仿真文件，在modelsim中运行即可。-This code can be realized 8bits 108M 4 way BT656 pixel interleaving input into 8bits 108M 4 way line of cutting the video data, and there are simulation files can be run in
3Channel_CIS_Processor_with-VHDL.ZIP
- This usefull source for control CIS Sensor and has fallowed functions 1) Read image data frome 3channel 200dpi CIS Sensor 2)Encoder Sync Technoledge for more high resolution analiysys with shared the time divition 3)Psudo Video Ram Read by
rgb2yuv
- 用VHDL和verilog编写的RGB颜色空间到YUV颜色空间的转换程序, 是FPGA视频处理中的常用程序!-Written in VHDL and verilog using RGB color space to YUV color space conversion process is commonly used in video processing FPGA program!
V4_SI
- 针对FPGA设计的信号完整性分析，以及设计指导,网页视频和音频，识货的下-FPGA design for signal integrity analysis, and design guidelines, web video and audio,识货next
DCT
- 用于视频图像编码的8×8DCT变换，可用于MPEG4.H263等VHDL编程-For video images encoded 8 × 8DCT transform, can be used to MPEG4.H263 such as VHDL Programming
Huffman
- 用于视频运动图像编码的HUFFMAN编码，可广泛运用于MPEG-Moving Picture for video coding Huffman coding, can be widely applied to MPEG
colorspaceconversion
- 用于视频压缩编码中的RGB信号到色差信号变换的VHDL程序，非常实用-For video compression coding of the RGB signal to the color difference signal transform VHDL procedures, very useful
VDHL
- Verilog的135个经典设计实例，直流电机控制，游戏机，三态总线，加法器，锁存器等-Verilog s 135 classic design example, DC motor control, video game consoles, three-state bus, adder, latches, etc.
VHDLbh
- 带获胜音乐的拔河游戏机，用计数器 译码器组成-With winning the tug-of-war music video game
H.264
- H.264-H.264 video coding
video_compression
- 用VHDL实现的视频压缩算法，希望大家学习学习-Using VHDL implementation of video compression algorithms, study study hope that everyone
yuv_rgb
- 完成ITUR656标准的视频流数据向RGB格式的转换。-Complete video streaming ITUR656 standard data format to RGB conversion. Test module
video_control_procedure
- 用VHDL实现视频控制程序(实现对图像的采集和压缩)-Using VHDL video control procedures (the achievement of the image acquisition and compression)
camera_up
- Camera Interface模块是视频输入转换存储模块。该模块一端接通用的video camera设备，另一端接AHB总线。实现了将Camera捕捉到的数据进行转换、并通过DMA存储到memory中。该IP支持ITU-R BT 601/656 8-bit 模式。支持YCbCr, RGB格式输入。可以将camera产生的YCbCr信号转换成24bit RGB 信号，然后下采样生成16bit RGB 5：6：5的LCD能直接读取显示的数据。该设备支持图像的镜像和翻转，以便适应手持式设备在移动环境