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v3-1-4-12
- A Novel VLSI Architecture of Hybrid Image Compression Model based on Reversible Blockade Transform
vlsi
- 参照8051系列MCU中断系统的相应控制应答功能，设计一个具有8个中断源的中断响应控制应答系统-Reference to the 8051 MCU interrupt system, the corresponding control response function, and design an eight interrupt sources interrupt response control response system
VLSI
- 实现crc16的串并连电路，希望大家-Crc16 string and even the circuit, we look
11
- HSPICE 全加全减器设计 带波形仿真文件 超大规模集成电路设计-HSPICE full adder full subtracter design with VLSI design of the simulation waveform files
Attachments_2012_06_28
- A2d converter in VLSI
Copy-of-DIGITAL-VLSI-DESIGN
- a manual for design implementation of fpga and ASIC using verilog
Oracle-cloud-computing-strategy.pdf
- Oracle 云计算战略 • 提供私有云和公有云两种解决方案供客户选择 • 提供全面、集成的 SaaS、PaaS 和 IaaS 产品 • 让客户根据业务需要采用云 最小面积的矩形。由于各种包装 是不可数无穷的，成功优化的关键问题 是有限的解空间的引进，其中包括一个 最佳解决方案。本文提出了这样一个解决方案空间 每个包装的代表由一对模块的名称序列， 被称为序列对。通过模拟搜索这个空间 退火，数百个模块已挤满有效地 证明
VLSI
- The AD7654 is a low cost, simultaneous sampling, dual-channel, 16-bit, charge redistribution SAR, analog-to-digital converter that operates from a single 5 V power supply. It contains two low noise, wide bandwidth, track-and-hold amplifiers that allo
synthesizable-circuit-design
- 天津大学VLSI系统设计讲义的一部分，作者魏继增，使用Verilog语言-Part of VLSI system design course handout of Tianjin University, by Wei Jizeng, in Verilog language
FTVT_Lab1
- Fault tolerant computing and VLSI testing assignment
ref-walsh-crosstak
- cross talk analyser reference papers in vlsi
VASC02---IEEE(1)
- scalable encryption algorithm vlsi implementation
D_flop
- D触发器，用于搭建各种时序逻辑电路，是最常用的触发器。目前超大规模集成电路中皆使用该触发器。-D flip-flops used to set up the various timing logic circuit, is the most common trigger. VLSI are using the trigger.
Dual-Elevator-Controller
- VLSI based dual elevator-VLSI based dual elevator
vlsi_Zijian
- A program to do the VLSI linear placement -- VLSI Automation homework-A program to do the VLSI linear placement-- VLSI Automation homework
YeapW09
- hi this is main project rearding to vlsi
VLSIDESIGN
- this is a vlsi design textbook
vhcg_latest.tar
- Viterbi algorithm is the most likelihood decode algorithm of convolution code. Viterbi decoder means the VLSI implementation of Viterbi algorithm. In the area of communication, convolution code is very popular, so how to improve the performance a
05~chapter-03-lfsim
- Slides from "VLSI test" book.
09~chapter-05-lbist
- Slides from "VLSI Test arch" book