搜索资源列表
SS7160.ZIP
- 该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL.
xc9572_1
- xilinx xc9572 cpld 实现的伺服电机控制器，电机控制输出，和增量编码器读取。-Xilinx xc9572 cpld achieve servo motor controller, motor control output, Incremental encoder and the reader.
testben
- 这是由xilin公司提供的测试文档，对于用XILINX公司的CPLD/FPGA的用户来说挺不错的。-xilin provided by the test documents, XILINX used for the CPLD / FPGA users quite well.
Xinlinx_ISE_study
- 用中文介绍Xilinx公司FPGA/CPLD的集成开发环境－ISE软件的简单使用
rfcs_top
- 带有PPC405的Xilinx FPGA通过CPLD实现远程配置的设计
Interface 8051 to Coolrunner CPLD(Xilinx App)
- Interface 8051 to Coolrunner CPLD(Xilinx App)
61EDA_C2194
- < xilinx ise 9.x fpga cpld设计指南>>, xilinx设计经典中的经典书籍,讲得非常全面.是fpga设计人员不可或缺的书籍-xilinx design classic of the classic books, put it very comprehensive. fpga design is an indispensable book
qq2
- Xilinx FPGA(CPLD) 下载电缆 原理图 -Xilinx FPGA (CPLD) download cable schematics Xilinx FPGA (CPLD) download cable schematic
DDS
- A simple VHDL implementation of a DDS on Xilinx Spartan 3E Starter Kit development board
xup-0.0.2.tar
- The Spartan3E Starter Kit is xup s only supported hardware platform. Its integrated programming hardware consists of a cy7c68013a-100axc EZ-USB and a XC2C256-VQ100-6C CPLD. Mysteriously, the starter kit s schematics exclude this USB programming
APPILICATIONOFXILINXCPLD
- CPLD COOLRUNNER XILINX -CPLD COOLRUNNER XILINX
JTAG_XILINX_ARM_LPT_PROGRAMMER
- This is LPT JTAG programmer for Xilinx FPGA/CPLD chips and for ARM-core microcontrollers.
eetop[1].cn_ise_book
- Xilinx ISE 9.x fpga&cpld设计指南 光盘附带内容
quaddecoder_verilog_ise11.2_used_09042010
- Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File. The Pinout is descr ipted in the Constrained file quad.ucf. To use them, y
CPLD-8051-Micorcontroller-Interface
- CPLD 与8051总线接口设计，XILINX参考设计-CPLD and 8051 bus interface, XILINX reference design
HOW-TO-USE-XILINX-ROMS
- 如何更好设计应用Xilinx FPGA/CPLD的ROM-How to better design application of the Xilinx FPGA/CPLD ROM
FPGACPLD-design-tools-Xilinx-ISE
- FPGA/CPLD设计工具──Xilinx ISE使用详解！x详细介绍了XilinxISE的使用方法！-FPGA/CPLD design tools ─ ─ Xilinx ISE explain the use of! x details use XilinxISE!
Xilinx-ise-9.x-fpga-cpld
- 《Xilinx ISE 9.X FPGA/CPLD设计指南》以FPGA/CPLD设计流程为主线，详细阐述了ISE集成开发环境的使用，并提供了多个示例进行说明。书中在介绍FPGA/CPLD概念和设计流程的基础上，依次论述了工程管理与设计输入、仿真、综合、约束、实现与布局布线、配置调试等在ISE集成环境中的实现方法和技巧。《Xilinx ISE 9.X FPGA/CPLD设计指南》结合作者多年工作经验，立足于工程实践，选用大量典型实例，并配有一定数量的练习题。随书配套光盘收录了所有实例的完整工程目录
CoG
- Semi-functional FSM and ROM for Xilinx CPLD to drive ST7565R based off Digikey example
coolrunner-ii_sch
- 基于CPLD的XILINX的系统设计，很适合初学者参考。-XILINX CPLD-based system design, it is suitable for beginners reference.