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dds
- 这是一个基于ＦＰＧＡ设计的ＤＤＳ信号发生器设计。能够生成正弦波＼ＡＳＫ＼ＰＳＫ＼ＡＭ＼ＦＭ等波形。-This is an FPGA design of DDS signal generator based on. Capable of generating sine \ASK\PSK\AM\FM and other waveforms.
ZHWX
- DDS 产生正弦信号，OOK，AM三种波形。 使用xilinx FPGA VHDL-DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.
udpip
- 赛灵思XILINX FPGA verilog写的UDP/IP协议，可用。-I am prepared to use verilog UDP protocol, the test is available.
c3_am_tx
- 使用CycloneIII FPGA实现纯数字AM发射机，播放WAVE格式的文件，通过FPGA数字调幅，从IO发射出去 -Use CycloneIII FPGA to achieve a digital AM transmitter, play WAVE format file, Digital AM modulation, transmitted by FPGA IO