搜索资源列表
niosii
- altera fpga nios2 demo qutarts file
3
- 串口通信的事例FPGA上面可以实现非常实用-FPGA serial communication above examples can be very useful for implementation
async
- 用FPGA实现RS232，代码经过测试通过-FPGA implementation using RS232, the code has been tested through
src
- a H.264/AVC Baseline Decoder，用FPGA来实现的编码和解码等等内容-a H.264/AVC Baseline Decoder, use FPGA to realize the encoding and decoding the content and so on
FPGA-Design
- FPGA设计流程指南 介绍基本的设计方法-FPGA Design Process Manual
uart_ise_vhdl
- fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file
dds
- dds算法的fpga实现 altera 根据不同设置，输出不同频率的信号源-dds algorithm to achieve fpga set according to different altera, the output of the signal source at different frequencies
cordiccos
- cordic算法的fpga的实现 采用altera芯片-cordic realization algorithm using fpga chip altera
Simulate
- FPGA控制AD逐点采集信号，并将AD转换后的数据串行发送出去。-FPGA to control the signal sampling point by point AD, AD conversion and serial data sent.
vhdl
- usb rtl code, to fpga or asic
PCM
- 基于FPGA的PCM编码器与解码器的设计-about fpga and pcm
SDRAM
- 这个是一个基于FPGA的SDRAM控制器系统，实现对SDRAM的读写操作，用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
dct2
- 这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
lcd_control_rtl_v3
- LCD display driver for xilinx fpga
dds
- 关于FPGA中DDS核参数设置的资料，英文版的XILINX资料-DDS on the FPGA in the data set of nuclear parameters, the English version of XILINX information
tut_nios2_introduction
- This tutorial presents an introduction to Altera’s Nios R II processor, which is a soft processor that can be in- stantiated on an Altera FPGA device. It describes the basic architecture of Nios II and its instruction set. The NiosII processor a
usb_SCH
- USB+FPGA电路设计原理图，实际的电路板运行正常，很有参考意义。-usb_sch
niossramflash
- 在altera FPGA ep3c25器件上实现niosii+sram+flash-Altera FPGA ep3c25 in devices to achieve niosii+ sram+ flash
niossram
- altera fpga ep3c25器件微处理器开发，niosii+sram, 已编译通过，可直接下载到开发板-altera fpga ep3c25 the development of microprocessor devices, niosii+ sram, compiled through, can be directly downloaded to the development board
CIII_NiosII_Small
- altera fpga ep3c25器件niosii处理器最小系统，已编译通过，可直接下载-altera fpga ep3c25 processor minimum system niosii device has been compiled through direct download