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Linux-driver-development2
- 作者:华清远见嵌入式学院。《Linux设备驱动开发详解》(08&09年度畅销榜TOP50)第2章、驱动设计的硬件基础。本章讲解底层驱动工程师必备的硬件基础,给出了嵌入式系统硬件原理及分析方法的全景视图。2.1节讲解微控制器、微处理器、数字信号处理器以及应用于特定领域的处理器各自的特点。2.2节对嵌入式系统中所使用的各类存储器与CPU的接口、应用领域及特点进行了详细讲解。2.3节讲解常见的外设接口与总线的工作方式,包括串口、I2C、USB、以太网接口、ISA、PCI和cPCI等。嵌入式系统硬件电路
1
- Cyclone III FPGA Starter Kit的原理图,orcad格式-Cyclone III FPGA Starter Kit schematic, orcad format
Ep2c5q208
- 关于FPGA(EP2c5q208)的原理图-On the FPGA (EP2c5q208) schematic
61EDA_C1113
- Altera公司的关于FPGA设计的资料, 其中包括了硬件的原理图以及相关的软件例程,为大家的学习提供了很好的例子。-Altera company about the FPGA design of material, Including the hardware diagram and related software routines, for all of us study provides a good example.
Nexys2_sch
- digilent最新fpga开发板nexys原理图资料,非常详细,规范。-digilent latest fpga development board nexys schematic information, very detailed, specification.
dso
- 用FPGA设计的数字示波器,有详细的设计过程、论文和硬件原理图-Digital oscilloscope with the FPGA design, detailed design process, paper and hardware schematics
nexy3
- fpga板 deligent 公司的 nexys3 开发板的原理图,给大家看下吧,很有用-fpga board deligent' s nexys3 development board schematics for everyone to look it, very useful
xlx_s6_omap-sch010411
- 采用spartan系列FPGA与OMAP-L138138芯片组成的混合信号处理系统(具有强大的外设能力)的原理图。-The SCH of a co-system which the Spartan series FPGA and OMAP-L138 chip from TI are employeed. The whole system has a strong capacity of external interface.
cor
- fpga核心板原理图 ep2c8q原理图-fpga core board schematic diagram ep2c8q
segments_display_ep2c20f484c7n
- 实现4位数码管秒表显示,有使能,复位的功能,并在altera fpga ep2c20f484c7n上实现,文档里含有,原理图,引脚分配图,代码,及相应的说明,适合入门的朋友。-Achieve four digital stopwatch display, there is enabled, reset functions, and altera fpga ep2c20f484c7n to achieve, the document contains, schematics, Pin Assign
www
- 完整的基于fpga的数字时钟的设计与实现,压缩文档是整个文档,其中的zzz,zzz1,zzz2,zzz3不同情况下的顶层原理图-Complete digital clock fpga based design and implementation, the archive of the entire document, which zzz, zzz1, zzz2, zzz3 different top-level schematic case
debounce_1_Sch
- 用QuartusII原理图形式编写的按键消抖程序,分频产生100Hz的按键采样时钟,采样时钟周期为10ms, 按键按下的时间与产生低电平信号的时间相等,按键按下的时间与LED灯亮的时间相等-*Project Name :debounce_Sch *Module Name :debounce_Sch *Target Device :Any Altera FPGA/CPLD Device *Clkin : 50MHz *Desisgner : zhaibin *D
qiduanxianshiyima
- 利用译码程序在FPGA/CPLD中实现16进制数的译码显示.通过EDA原理图设计方法利用prim库中7448芯片进行7段译码显示-Using decode program FPGA/CPLD realized in hexadecimal number decoding display. Through the EDA principle diagram design method using the prim library 7448 chips for 7 period of decodin
Logic-analyzer
- 一个逻辑分析仪的开发源码,包括单片机FPGA的所有程序,以及硬件的原理图。-A logic analyzer source development, including single-chip FPGA All Programs, and hardware schematics
ygyTest
- 利用开源网站上的8051核,在Spartan 3A开发板上实现成功,开发环境是Xilinx ISE Design Suite 12.3,顶层文件基于原理图开发,扩展了外部ROM和RAM,且更改了地址宽度-implment the mc8051 IP in spartan-3A FPGA starten kit.
MAXPPLUS-II
- 这是一个有关使用MAX+PLUS II原理图输入设计方法进行FPGA设计的教程,便于快速入门。-This is about using the MAX+ PLUS II schematic design methodology for FPGA design tutorials, easy Quick Start.
EP2C5_EP2C8
- EPC25_EPC28_FPGA开发板原理图,FPGA的最小系统设计,对于初学者学习FPGA有很大的帮助-EPC25_EPC28_FPGA development board schematics, the minimum system design of the FPGA for beginners to learn FPGA a great help
ask2cb
- 一个FPGA开发板的原理图,用来自行开发FPGA板的很好的资料-An FPGA development board schematics, good information to develop their own FPGA board
CPLD-Three-voting
- CPLD/FPGA 设计实例手册 用VHDL语言设计三人表决器 用原理图输入的方式设计三人表决器 用verilog-HDL语言设计三人表决器-CPLD/FPGA design example manual Three of the voting machine VHDL language Schematic design of a three-member voting Verilog-HDL language design three-member voti
arriaIIGX_2agx125_fpga
- Altera公司的Arria II GX系列的原理图和pcb文件,注意,是capture及pdf格式的原理图和allegro格式的PCB文件,稍微修改修改就可以用在您的设计中,让fpga的硬件设计变得简单和高效。- Arria II GX FPGA Development Schematic(caputure and pdf format) and PCB file,very useful for fpga design,let fpga hardware design become easy