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plj
- 本程序为VHDL编写的频率计,测频范围从0.1Hz到1G-VHDL procedures for the preparation of the frequency meter, measuring frequency range from 0.1Hz to 1G
1111078805
- VHDL使用例子,包括走马灯,路灯,天线,电子表,数字频率计等-examples of the use of VHDL, including merry-go-round, street lamps, antennas, electronic watches, digital frequency meter, etc.
CPLDOGRAM
- 摘要: 文中介绍了数字频率计的结构、工作原理及计数方式,给出了基于VHDL语言的频率计系统的行为源描述,讨论了在VHDL的高级综合系统QuartusII的支持下,自顶向下地进行传输模块的设计工程,并给出了系统的仿真波形以及其应用实践。-Abstract : This paper introduces a digital frequency of the structure and working principle and counting, is based on VHDL Frequency
fpga-example2
- ASK调制与解调VHDL程序及仿真 FSK调制与解调VHDL程序及仿真 PSK调制与解调VHDL程序及仿真 基带码发生器程序设计与仿真 频率计程序设计与仿真-ASK modulation and demodulation VHDL simulation procedures and FSK modulation and demodulation process and VHDL simulation PSK modulation and demodulation process
GWDVPB
- 基于VHDL语言的高精度频率计的设计,已通过实验测试-based on VHDL frequency precision of the design, experimental test
counter_bcd7
- bcd十进制计数器,用于频率计设计的计数器单元,输出zeros用于选通量程使用!-bcd decimal counter, the counter for frequency counter design unit, the output zeros for the use of strobe range!
VHDL-djdplj
- 基于VHDL语言的十进制等精度频率计的设计,采用VHDL语言,运用自顶向下的设计思想, 将系统按功能逐层分割的层次化设计方法,使用Quartus8.0开发环境,实现了频率计的设计。-VHDL language based on the decimal precision frequency meter, etc. The design, using VHDL language, the use of top-down design, the system is divided by func
VHDL-based-digital-frequency-meter-
- 本源码介绍了基于VHDL的数字频率计设计,其风格简约而实用-The source describes the VHDL-based digital frequency meter design, the style is simple and practical
pinlvji
- 自己编的一个频率计,verilog语言写的,用数码管显示方波的频率,测量量程是0.1hz~9999999hz,测方波的稳定性极高。-Their series a frequency counter, verilog language written with the digital display of the square wave frequency, measurement range is 0.1hz ~ 9999999hz, high stability of the square w
vhdl
- 交通灯控制 频率计case when语句 vhdl硬件描述语言编写-Vhdl traffic light control hardware descr iption language of transformation to achieve control of traffic lights
Perfect-VHDL
- 1 步进电机定位控制系统VHDL程序与仿真 2 采用等精度测频原理的频率计程序与仿真 3 URAT VHDL程序与仿真 4 自动售货机VHDL程序与仿真 5 电子琴程序设计与仿真 6 出租车计价器VHDL程序与仿真 7 DAC0832 接口电路程序 8 FSK调制与解调VHDL程序及仿真 -1stepper motor positioning control system for VHDL procedures and simulation
1
- VHDL频率计的设计 验证过能用 大家一起学习交流-Use VHDL cymometer design validation
frequency-measuring-VHDL
- 采用等精度测频原理的频率计程序与仿真,本文为DOC文档,附有源码和仿真波形-Equal precision frequency measuring principle of frequency meter program and simulation, this paper for the DOC document, attached to the source code and simulation waveform
Frequency-meter-VHDL
- 频率计程序设计与仿真。本文为DOC文档,附有源码和仿真波形,详见文档-Frequency meter program design and simulation, this paper for the DOC document, attached to the source code and simulation waveform
VHDL
- VHDL,介绍简单的语句,有计时器、频率计等例子。-Very-High-Speed Integrated Circuit Hardware Descr iption Language
DDS-VHDL
- 数字频率计DDS的VHDL代码,有很详细的注释-the source code of DDS in VHDL
pinlvji-design-VHDL
- 使用Altera公司的EP2C35系列的FPGA芯片,利用SOPC-NIOSII-EP2C35开发板设计和仿真一个数字频率计,对1Hz~250KHz 的脉冲进行频率测量,采用等精度测量,即在所测量的整个频段内部,均可实现相同精度的测量,测量精度与频率无关,结果在数码管上显示-The use of Altera EP2C35 series FPGA chip using the SOPC-NIOSII-EP2C35 board design and simulation of a digital
AD9832
- AD9832频率计的VHDL驱动,可以调整频率及相位(VHDL driver for AD9832 frequency meter)
hdlsrc
- cONVERTER FROM MAT TO HDL
1
- VHDL代码,一些课本的小程序。包含3线-8线译码器,4选1选择器,6层电梯,8线-3线编码器,8线-3线优先编码器,8选1,BCD-7段显示译码器真值表,半加器,摩尔状态机,数字频率计,数字时钟,序列检测器的设计,一般状态机等等。(VHDL code, some textbooks for small programs. Includes 3 -8 decoder, 4 1 selector, 6 elevator, line 8 Line 8 line -3 encoder, -3 prio