搜索资源列表
PAIRCRASH
- 基于ALTERA公司的NIOSII的对对碰游戏的设计-NIOSII based on ALTERA s right right touch of the game design
adder44
- adder 4 + 4 bits, for use with a Altera, and 2 displays 7 segments-adder 4+ 4 bits, for use with a Altera, and 2 displays 7 segments
SerialPort
- 一个用verilog HDL 编写的串口发送程序，可以下载到FPGA中。已经在ActelFPGA中试过了，很好用。稍微修改之后，可以与Xilinx和Altera公司的FPGA兼容。-A programe dialogue to transmit a serial data which is writen by Verilog HDL.
niox
- Open source and clean clone of Altera NIOS-II Soft Processor. Not completed but some test do run ok.
fivealterakaifabanziliao
- 5款ALTERA FPGA开发板原理图合集 -5 ALTERA FPGA development board schematic Collection 5 ALTERA FPGA development board schematic Collection
qts_qii54004
- ALtera Corpartion handbook for SOPC builder
mydds_rom
- 自己在参加altera NIOSii 软核设计大赛时编写的一个ip核，用于产生频率可调的正弦波-Their participation in the design of soft-core altera NIOSii the preparation of a competition when nuclear ip, used to generate the sine wave frequency adjustable
ISPDownload
- protel99文件，下载电缆SCH及PCB(包括LATTICE ALTERA ARM AVR XILINX S52)-protel99 file, download cable sch and pcb (include : LATTICE ALTERA ARM AVR XILINX S52)
EPCSx
- ansi-c code for programming EPCS1/4/16/64 flash chips from Altera, code used with 8051 type microcontroller and compiled with Keil. enables firmware upload for Altera FPGA.
I2C
- I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This mo
Lab2a
- C Code for a Nios II to switch led on a board with an FPGA ALTERA
cw
- 用ip核设计的信号发生程序，altera的 用ip核设计的信号发生程序，altera的 用ip核设计的信号发生程序，altera的 用ip核设计的信号发生程序，altera的-signal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for alte
ddr2_hamdec64
- VHDL实现的64bit海明码解码模块。 可适用于 Xilinx FPGA, Altera FPGA。-VHDL Implement 64bit Hamming Code （decode）
avalon_pwm
- altera公司的PWM设计，非常详细！-altera' s PWM design, very detailed!
PPort
- 计算机并行接口与单片机接口的CPLD烧写文件，是ALTERA芯片的-Computer parallel port interface of the CPLD and MCU programmer document ALTERA chips
code
- This code for ASCII ALTERA
UP3_clock
- 这是一个电子钟程序，采用VHDL开发，在altera的FPGA板上实现。-clock VHDL altera FPGA
pio_shiyan
- NIOS学习的例子，使用QUARTUS进行编辑和IDE共同实现的，使用ALTERA公司的内带IP完成例子。-NIOS study example, the use of QUARTUS common IDE for editing and realized within the company using ALTERA complete with examples of IP.
usb-blaster
- quartus多种USB-bletera 自制下载线！
led_test
- 用Altera公司的EP2C35F672C8可配置软核技术生成的流水灯程序，在革新开发板上调试好的。-EP2C35F672C8 using Altera' s soft-core technologies can be configured to generate light flow procedures, the innovative development of a good on-board debugging.