搜索资源列表
de2_lcm_ccd_sram
- 这是altera公司DE2的lcm-ccd-sram的代码，希望对大家编写有用-this code based on the altera DE2 board
Altera
- in file sare karie ,khodeto aziat nakon-in file sare karie ,khodeto aziat nakon......
DE2_pio
- altera University Program 的 Avalon总线的IP核，GPIO，可以直接解压以后挂载在Avalon总线上-altera University Program of the Avalon bus IP core, GPIO, after decompression can be directly mounted in the Avalon bus
fir
- code for fir filter see it is from altera site.-code for fir filter see it is from altera site.
analogue-digi-ana-converter
- design and implementation of a format conversion system on the Altera NIOS board(QUARTUS) which reads an analogue input, converts it into digital data, and then does the reverse conversion back into analogue format. This will be done by taking an ana
vhdl-MIPS
- Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
cyclone123DevHandbook
- altera公司的cyclone123系列芯片手册合辑-Series altera chip companies cyclone123合辑Manual
IIRtest
- quartusII9.0开发环境下巴特沃斯IIR滤波器的实现完整的工程文件，同时里面有文档详细说明如何用modelsim对altera芯片进行仿真-development environment quartusII9.0 Butterworth IIR filter to achieve a complete project file, but there are documents in detail how to use modelsim to altera-chip simulation
AlteraQuartusII
- Altera FPGA开发软件QuartusII的介绍和使用手册，有助于学习Altera FPGA的开发。-Altera FPGA development software QuartusII introduction and use of manuals, help to study the development of Altera FPGA.
080637
- 基于FPGA的VGA显示控制器的实现 VGA作为一种标准的显示接口得到广泛的应用。本论文依据VGA接口设计原理，采用VHDL语言以及Altera 公司的Cyclone系列FPGA进行VGA显示控制器的设计，最后给出了Ouartus II的仿真结果。-As a standard display interface，VGA has been widely used．According to the designing principle ofVGA interface， Use VttD
LED
- 在ALTERA的DE 2 开发板上做的一个类似闪烁的彩灯，用了16个LEDR，可以直接下载到板子上运行，基于经典的开发平台Quartus II+SOPC Builder+Nios II IDE 做的，只要看了以后，你就会自己设计各种花样的彩灯闪烁的样子了.所用语言有多种，VHDL,C/C++等-DE 2 in the development of the ALTERA board to do a similar flickering lantern, with a 16 LEDR, can be
dds_v3_test3
- DDS控制器在FPGA上的实现，使用Quartus II8.1开发环境，使用Altera 原理图设计方法，10位宽度，配合dac9-DDS controller in the FPGA on the realization of Quartus II8.1 use development environment, the use of Altera schematic design, 10-bit width, with dac900
pinlvji_5
- 用Verilog语言实现的5位频率计设计，为实现功能验证，测频信号是由内部时钟源分频得到，为25KHZ，数据输出为串行输出。使用的硬件资源是altera公司的EPM7218，晶振为40MHZ。-Verilog language used to achieve the five frequency meter design, to achieve functional verification, signal frequency measurement by the internal clock
an224
- altera high sped routing guidelines
ac_control
- air conditioner controller ,with three speeds,cool/heat based on altera fpga
up_down_counter
- 32 bit up/down counter with count enable based on altera fpga
tri_ramp_gen
- an 8-bit triangle/ramp wave generator based on altera fpga
uart
- 用ALTERA的芯片做的多串口代码，内部做了3个通用串口，适合51 ARM等CPU，有完整的ALTERA工程和仿真波形-uart FOR ALTERA
design
- xilinx、arm、avr、s52、altera及lattice下载线的原理图和PCB图-xilinx, arm, avr, s52, altera, and lattice download line schematic and PCB diagram
61EDA
- 分析了各种视频采集方案的研究现状。对如何采用CCD 摄像头采集高分辨率、高质量的图像以及基于FPGA 的嵌 入式视频图像采集系统的实现方法进行了研究。采用了以摄像头+ 解码芯片模式为采集方案， 针对视频解码芯片 ADV7181B，实现了I2C 总线配置、ITU656 解码、VGA 显示模块的设计。设计的视频采集控制器已经在Altera 公司的CycloneII 系列FPGA(EP2C35)上实现。结果显示本设计具有速度高、成本低、易于集成等优点-Analysis of a varie