搜索资源列表
FFT_IP
- Xilinx FPGA 的IP核,实现FFT功能的-Xilinx FPGA IP core, FFT function
quartusfft
- 文章讲述了quartus中ip核使用,主要是关于fft ip核的使用-the use of ip core in qquartus
9_fft
- 利用FPGA的IP核来实现fft的设计-The use of FPGA to realize the IP core design fft ,,,,,
Quartus
- Quartus中fft ip core的使用.txt-Fft ip core in Quartus use. Txt
altera_fft
- Alter公司的FFT的IP核源代码,在QuartusII软件中运行-Alter' s FFT of the IP core source code, software running in QuartusII
twin_butterfly.0.1
- 本程式实现了逆序入,顺序出的基4 FFT 算法,并且将奇偶修列分开操作,利于双核DSP上的并行计算-The program achieved the reverse order in, order out of the base 4 FFT algorithm, and will operate separately from the column parity amendment, which will help dual-core DSP on the parallel computing
Dsp-fixed
- 本书全面系统地介绍了DSP 芯片的基本原理、开发和应用。首先,介绍了目前广泛使用的DSP 芯片的基本结构和特 征,定点和浮点DSP 处理中的一些关键问题。然后,对用C 语言和MATLAB 语言进行 DSP 算法的模拟进行了介绍。接着,以目前应用最广的TI DSP 芯片为例,介绍了定点和 浮点DSP 芯片的软硬件设计方法,DSP 芯片的C 语言和汇编语言的开发方法以及DSP 芯 片的开发工具及使用,并以三个应用系统的设计为例,介绍了定点和浮点DSP 芯片的开 发过程。最后,
trunk
- 定点算法实现的FFT基-4 IP核源代码,文件使用的TXT格式,方便大家阅读,复制到ISE中即可仿真综合-Fixed-point algorithm of the FFT-based-4 IP core source code, use the TXT file format to enable easy reading, can be copied to the ISE in the integrated simulation
fft_ip_core
- FFT的FPGA硬件实现,利用ALTERA公司的IP核来实现此功能,包含工程文件和相关例程-FFT hardware implementation, FPGA implementation of FFT function, using ALTERA s IP core to achieve this functionality
dec_2011seminar
- fft projects for soft core developments
pipelined_fft_128_latest.tar
- CFFT是一个数据宽度和点数都可配置的基4 FFT core,由于旋转因子是用CORDIC算法实现的,因此经过FFT后信号的增益和标准的FFT算法不同。但对于OFDM调制、解调等应用并不重要。由于增益是确定的,因此在输出时乘以确定常数即可等价标准的FFT。该FFT core的输入是正序的,输出是按照基4反序的-CFFT is a data width and number can be configured based 4 FFT core, due to the rotation factor
fft-ip-core
- 通过调用ISE中的fft IPcore实现了fft计算,输入数据通过textio从文本文件读入,处理后的数据再读入文本中。由于数据精度问题,与MATLAB计算的结果存在一定的误差-By calling the ISE of FFT IPcore implements the FFT computation, the input data through textio read a text file, after processing the data to read the text aga
fft
- 基于fpga的fft变换,用ip核实现。用vhdl编写-Fpga based fft transform, use ip core implementation. Written in vhdl
cf-fft
- 用ip核实现fft。用vhdl编写。altera的fpga-Ip core implementation using fft. Written in vhdl
16FFT
- Xilinx的16点傅里叶分析,内有详细说明-The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary compone
1024FFT
- Xilinx的1024点傅里叶分析,内有详细说明-The xFFT1024 fast Fourier transform (FFT) Core computes a 1024-point complex FFT. The input data is a vector of 1024 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary
两种滤波
- 滤波核心技术,可用于CT和各种图像滤波,FFT,RADON变换是核心(Filtering core technology, can be used for CT and various image filtering, FFT, RADON transform is the core)
adsp-2191_complex_rad2_fft
- 这个目录包含ADSP-2191单核程序例子,实现64位或更多位的 radix-2 FFt算法。CFFT2_2191.ASM文件里包含详细讨论。(This directory contains an example ADSP-2191 single-core subroutine that implements radix-2 FFT of length 64 or greater on input data x(n). A detailed discussion of the compl
pipelined_fft_64-master
- Pipelined FFT/IFFT 64 points (Fast Fourier Transform) IP Core User Manual
fft_32k
- FFT 32K点设计实例v1.0.0自述文件 本自述文件包含以下部分: 工具要求 o Quartus II编译 o ModelSim仿真模型 o MATLAB模型(FFT 32K Point Design Example v1.0.0 README File This readme file for the Fast Fourier Transform (FFT) 32K Point Design contains information about the design exam