搜索资源列表
FIFO
- 异步FIFO Verilog源代码，对控制读写地址进行设计，以便写满和读空只产生一个标志，实现对FIFO的缓冲控制-Asynchronous FIFO Verilog source code, designed to control read and write addresses in order to fill and read empty produce only one flag, the FIFO buffer control
fifo
- 完成整个Wimax的上下行的基带算法的DSP的源代码-The code for wimax downlink
fifo
- 模拟页式虚拟存储管理中硬件的地址转换和用先进先出调度算法处理缺页中断.虽然是文档文件，其源代码可以直接拷贝至C++运行，并且文档最后给出相应执行结果。-Simulation of the hardware address translation page of virtual storage management and FIFO scheduling algorithm for processing a page fault, although it is a document file an
fifo
- actel 的同步硬件fifo的testbench,初学者可以看一下testbench怎么写的。-the testbench code of actel fpga,it is right for new learner~
FIFO
- 这是本人学习FPGA时亲自原创的代码，实现的是8x8的fifo结构，采用同步的FIFO结构，仿真测试已经成功！-This is I learn when the original code FPGA in person, the realization of 8 x8 is the fifo structure, the synchronization of the fifo structure, the simulation test is a success!
fifo
- 异步FIFO源代码，由模块调用自动生成，不包含测试向量。-Asynchronous FIFO source code automatically generated by the module calls, does not contain the testbench.
FIFO
- vhdl code for first in first out
fifo
- 同步fifo的verilog代码，很好的资料，值得学习-Synchronous fifo verilog code, very good information, it is worth learning
ov7670-fifo-stm32
- ov7670摄像头stm32驱动大集合，里面有13个详细代码，非常适合初学者学习，ov7670带fifo,有的带有源晶振，有的不带晶振,也有2.4的TFT彩屏，也有3.2的TFT彩屏-The the ov7670 camera stm32 drive large collection of 13 detailed code, and is very suitable for beginners to learn, ov7670 with fifo some with source crystal
FIFO
- FIFO is accomplished with the code which is written using the language of verilog.FIFO is the means of first output while first input
fifo
- This VHDL code for FIFO that is used in a NOC router-This is VHDL code for FIFO that is used in a NOC router
fifo
- fifo buffer in vhdl, first in first out in vhdl, vhdl code
fifo
- FIFO的VHDL代码，最简单的同步FIFO设计，仅供参考-FIFO VHDL code
fifo
- IDT7205 FIFO 读写时序代码！-IDT7205 FIFO read and write timing code!
FIFO
- 是用verilog HDL写的基于FIFO的串口发送机的设计，很详细的代码，很值得学习，已经验证通过-With verilog HDL based on FIFO serial transmitter design, write code, it is worth learning, has been verified by.
FIFO-and-CAM
- verilog code for gray counter,synchronous and asynchronous fifo
Queue
- Queue库函数的c语言源代码， Queue FIFO C 绝对可用的FIFO 代码。-The Queue library functions c language source code, Queue FIFO C absolute available FIFO code.
code
- 虚拟存储器，第一题：模拟分页式存储管理中硬件的地址转换和产生缺页中断。第二题：用先进先出（FIFO）页面调度算法处理缺页中断。第三题：用最近最少用（LRU）页面调度算法处理缺页中断。 -Virtual memory
fifo
- 异步fifo ,verilog 源代码，含工程文件，modosim 下运行-Asynchronous fifo verilog source code containing the project file run modosim
FPGA-FIFO-VHDL
- 这是一个基于FPGA的异步FIFO设计，利用的VHDL硬件描述语言，内容分析清楚，附带完整代码-This is an FPGA-based asynchronous FIFO design, the use of VHDL hardware descr iption language, content analysis, with complete code