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fir_hdl.rar
- 一个 FIR 滤波器的 verilog 实现, 与 matlab 产生的 reference code 相互验证。,Verilog a FIR filter to achieve, with the reference code generated by matlab mutual authentication.
MyFilter.rar
- FPGA实现数字滤波器,用VHDL语言实现的直接1型FIR滤波器,具有较好的参考价值。,FPGA realization of digital filters using VHDL language to achieve the direct FIR filter type 1, has a good reference value.
FIR-filter-VHDL-code
- 基于FPGA的17阶FIR滤波器VHDL代码。文件附带了FIR数字滤波器理论的介绍。-FPGA-based 17-order FIR filter VHDL code. File with the FIR digital filter theory introduction.
fir_16
- vhdl代码 实现16阶fir滤波器,可以仿真通过-vhdl code fir filter stage 16 can be adopted simulation
FIR
- 基于FPGA的FIR滤波器设计思想,里面有很好的算法供大家参考-FPGA-based FIR filter design ideas, there are very good for your reference algorithm
vhdl
- FIR滤波器的性能参数 设计一个滤波器最基本的就是性能参数的,决定着滤波器的实际功能.比如阶数,截至频率。 本文滤波器设计参数 ①输入,输出数据宽度10位 ②阶数为4阶的线性相位FIR滤波器, ③类型:带通 -FIR filter performance parameters The design of a filter is the most basic performance parameters, determines the actual filter fu
fir-vhdl-code
- FIR FILTER CODE with VHDL
fir
- code for fir filter see it is from altera site.-code for fir filter see it is from altera site.
FIR
- FIR滤波器的VHDL源代码及测试文件,已通过编译仿真,绝对正确。-FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.
fir
- 先用matlab得到所需滤波器的系数,将AD采样的数据经过fir滤波器后输出-First to use matlab to obtain the required filter coefficients, data from the AD sample, after the output filter through the fir
FIR
- FIR filter up to 128x
fir
- Verilog编的fir滤波器,可以自己输入参数序列,产生滤波波形-Verilog compiled fir filter, input parameters can be their own sequence, resulting in filtered waveforms
fir
- 数字电路设计中的,fir滤波器设计,我做的是8位宽的,利用vhdl实现,附带了完整的代码,报告,我没有对我的信息进行删除,是希望大家能够诚实的利用这个代码,提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information i
FIR-filter-vhdl
- 工程:用VHDL语言实现的FIR滤波器设计。-FIR filter using vhdl using QuartusII
FIR-filter-using-fpga-design
- 基于FPGA的高阶FIR滤波器设计4有matlab设计步骤 4.3更详细 第六章量化系数实例-FIR using FPGA ,QuartusII software
FIR
- 实现FIR滤波,利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
fir_PGA
- 一种基于verilog的fir滤波源码,并带matlab仿真源程序。-Based on the fir filter verilog source code and source code with matlab simulation.
fir
- this is an vhdl code for fir filter-this is an vhdl code for fir filter....
VHDL-Example-2
- fir filter vhdl code
fir filter vhdl code
- FIR filter design using Matlab Coefficient file and RTL design for FIR filter Design