搜索资源列表
NAND256R3A_VE1
- 256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual -256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
wp_max_flash
- FPGA中FLASH配置控制源码,VHDL和Verilog
MXIC-SPIFlash-Model
- Verilog based simluation model for MXIC SPI Flash.
hdl
- 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制
flash02
- 一个我自己写的FPGA读写FLASH代码,在QUARTUS 下用verilog编写,falsh的型号是k9f5608u0d,经测试可以用。-I wrote a FLASH FPGA to read and write code, written in QUARTUS next with verilog, falsh model is k9f5608u0d, can be tested.
DDR_FLASH_VHDL_Verilog
- FPGA DDR 外部RAM 读写的verilog代码,以及FLASH的vhdl代码-DDR SRAM READ AND WRITE VERILOG CODE ,FLASH VHDL CODE ,FPGA
NANDFLASH
- 用VHDL开发的NANDFLASH的读写程序,给出 NANDFLASH的时序正确的读写-NANDFLASH developed using VHDL to read and write the procedures, timing NANDFLASH give the correct reading and writing
SRAM_interface
- PSRAM 和flash接口的verilog实现。-Numonyx M18 SCSP StrataFlash with PSRAM interface ( AD-Mux)。
Reading-User-Data-from-Proms
- FPGA的配置中,从Flash中读写用户数据,包括VHDL、Verilog程序-in configuring FPGA,reading and writing user data from flash,including the VHDL and Verilog code
Using-JTAG-PROMs-for-data-storage
- Xilinx FPGA的配置中,从Flash中读写用户数据,包括VHDL、Verilog程序-in configuring Xilinx FPGA,reading and writing user data from flash,including the VHDL and Verilog code
NANDController
- verilog编写的nand flash的控制程序 -nand flash controller based on verilog
flash016d_top
- 控制FLASH读写的控制器verilog代码-Control of the controller to read and write verilog code FLASH
ydy_10_7
- FPGA 学习 NIOSII学习 FLASH 镜像文件-FPGA verilog
74serie-code
- 74系列的源代码 里面还包含了testbench和详细的代码说明-Prepared by flash controller vhdL source code. Contains testbench. Programming Language:VHDL, Tags:VHDL-FPGA-Verilog,
flash_simulate
- 在Modelsim环境下,Verilog语言编写的Flash模拟器。-In the Modelsim environment, Verilog simulator written in Flash.
led_flash
- LED闪烁适合初学者联系使用,LED流水灯程序 -LED-flash LED LIUSHUIDENG VERILOG HDL FPGA适合初学者联系使用,LED流水灯程序
flash_ctr
- 基于FPGA的verilog语言对flash的读写控制信号的实现-failed to translate
NANDFlashcontrolandFIFOcontrol
- 实现NAND Flash块的控制存取以及同步的FIFO的控制 verilog 代码-NAND Flash control access and control of the synchronous FIFO verilog code
FPGA_flash设计
- 我们的设计是用一个FSM控制器来控制发送什么命令,flash模块判断FSM发送过来的state信号来选择应该执行什么操作,当命令写入或者读出后,会发送一个flag_done命令,这个命令让我们判断上个指令是否完成,如果完成后FAM将发送下一个命令.(Our design uses a FSM controller to control what commands are sent. The flash module judges the state signal sent by the FSM