搜索资源列表
FM-ok
- VHDL编写的驱动DDS,ad9850的程序,用于产生FM波
DDS_信号源
- dds 精确步进100HZ.拨码开关选择FSK,FM等功能.最高频率25M,DA芯片9760.VHDL编写
dds_9760_ALL1
- DDS频率精确步进100HZ,拔码选择FSK,PSK,FM,ASK功能。-dds base on vhdl
dds_9760_OK
- DDS信号源程序,用VHDL编的。里面可用拨码开关选择相应的功能:FM,ASK,PSK,AM(这一点实现的不是很好),但其它的很好。频率可达25M-DDS signal source, for the use of VHDL. DIP switch which can be used to select the appropriate function: FM, ASK, PSK, AM (This is not to achieve good), but other well. Frequen
dds
- 如何利用FPGA产生DDS调频信号 很具体的-How to make use of DDS generated FM signal FPGA specific
dds
- 基于DDS的调频调相 通过改变频率控制字来控制 程序编译过 搭过硬件 可以实现-FM Based on DDS phase modulation by changing the frequency control word to control the program compiled the hardware can be achieved take-off
dds_final
- 使用Verilog HDL语言实现的一个DDS,可以发生0-10Mhz正弦波、方波、三角波,频率步进可调,FM调制、AM调制,调制度可调。DA芯片为8位并行,160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjusta
xxtpxh
- 线性调频信号运用dds中改变k来实现信号调频的策略-Linear FM signal to change the use of k dds FM' s strategy to achieve signal
ep1c12_29_dds
- 基于周立功SOPC实验开发平台,利用VHDL语言,实现DDS调频-Zhou, who based SOPC experimental development platform, using VHDL language, to achieve DDS FM
DDS(fsk-ask-psk)
- 基于VHDL的波形调制,其中包括调频、调幅,调脉宽等-VHDL-based waveform modulation, including FM, AM, pulse width modulation
BPSK
- 在quartus ii下完成的用VHDL语言编写的数字式调频BPSK的调制,其中DDS和成型滤波使用ip核完成-Accomplished in quartus ii the use of VHDL language digital FM BPSK modulation, which use the ip filter DDS and forming complete nuclear
zhongji
- 基于vhdl的dds信号发生器程序,具有一致十k调频功能,输出32k及64k正弦波-Based on the dds signal generator vhdl program has a consistent ten k FM function, 32k and 64k sine wave output
DDS
- DDS的FPGA实现(VHDL),只可调频,调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)